Innovus App Options — Complete ← Home
Educational Reference Only. This content is an independent study reference. App option names, descriptions and examples are provided for learning purposes. Always verify against official Cadence / Synopsys documentation. This site is not affiliated with or endorsed by Cadence Design Systems or Synopsys Inc.
13
INNOVUS APP OPTIONS — COMPLETE

TSV and Bump Routing

S.No App Option Description Example
1setNanoRouteMode -Innovus> globalDetailRoute 2. After Innovus has competed routing, save the design for verification. This will also save the markers within the design, indicating the areas of change. innovus> saveDesign Litho_Fixed.enc 3. The Innovus router marks the areas of change and you can run Litho only on these areas of change rather than on the complete design, thereby saving time. Write out the incremental HIF file that will be used to run Litho only on the changed areas. innovus> writeHif -file IncrVerify.hif 4. Now, run LPA in the incremental area to check for hotspots after Innovus has fixed the litho
2setNanoRouteMode -VSS} 3. Set same-layer interleaved shielding constraints In some scenarios, user may want to create shielding wires between signal routing wires on same layer. It is named as “interleaved shielding”. a. setFlipChipMode -constraintFile fc_shield.const b. fc_shield.const file content. Following example defines shielding width to be 1.0 um, shielding-to-signal spacing to be 2.0 um and shielding net is VSS SHIELDWIDTH 1.0setNanoRouteMode - route_interposer_interlayer_shielding_nets {METAL1:METAL4
3setNanoRouteMode -route_connect_to_bumpsRouteDesign Bump to Bump RoutingsetNanoRouteMode -route_connect_to_bumps
4setFlipChipMode -constraintFileB. fc_shield.const file content. Following example defines shielding width to be 1.0 um, shielding-to- signal spacing to be 2.0 um and shielding net is VSS SHIELDWIDTH 1.0 SHIELDGAP 2.0 SHIELDSTYLE c SHIELDNET VSS 4. Create PG stripes over PG bumps 5. Route constrained Bus nets and shielding
5setNanoRouteMode -METAL3 2.0} c. Interlayer shielding layers Following example defines interlayer shielding wires are routed below M2 and M4 layer, respectivelysetNanoRouteMode - route_interposer_interlayer_shielding_widths {METAL1 2.0
6setNanoRouteMode -METAL3 2.8} b. Interlayer Shielding Width Following example defines routing width (2 um) of interlayer shielding wires on layer METAL1 and METAL3setNanoRouteMode - route_interposer_interlayer_shielding_offsets {METAL1 2.8
7setNanoRouteMode -METAL4 bottom}setNanoRouteMode - route_interposer_interlayer_shielding_layers {METAL2 bottom

Comments

Leave a Reply

Your email address will not be published. Required fields are marked *

Replying to