| 1 | setPlaceMode -place_global_soft _guide_strength | Instructs the placement engine to place modules specified as soft guide in the floorplan file closer together. The degree of closeness depends on the strength value provided | setPlaceMode -place_global_soft_guide_strength |
| 2 | setNanoRouteMode -route_detail_auto_stop | Controls whether the router automatically stops routing when it finds too many violations. Setting to false allows routing to continue past the maximum number of violations | setNanoRouteMode -route_detail_auto_stop true |
| 3 | setPlaceMode -place_opt_run_global_place | Controls global placement behavior inside place_opt_design for the mixed placer and ECO flows. Set to seed when place_design -concurrent_macros is run. seed option uses seed placement from concurrent macro placement and runs incremental standard cell placement then preCTS optimization | setPlaceMode -place_opt_run_global_place seed |
| 4 | setMultiCpuUsage -localCpu | Sets the number of local CPU threads for NanoRoute ECO routing | setMultiCpuUsage -localCpu 8 |
| 5 | setPlaceMode -place_design_refine_macro | When enabled, automatically calls refine_macro_place after place_design -concurrent_macro to legalize macros based on constraints such as halo, blockages, forbidden spacing, and min-space | setPlaceMode -place_design_refine_macro true |
| 6 | setNanoRouteMode -route_third_party_data | Enables third-party ECO data mode, allowing DEF special nets to be converted to regular nets for ECO routing | setNanoRouteMode -route_third_party_data true |
| 7 | setPlaceMode -place_global_place_io_pins | When enabled, place_design -concurrent_macros also places and optimizes I/O pin locations to reduce wire length and congestion | setPlaceMode -place_global_place_io_pins true |
| 8 | setNanoRouteMode -route_third_party_data | Enables third-party data support for ECO routing and layer only ECO routing; supports non-DEF connectivity models, multiple NDRs per net, and other third-party structures | setNanoRouteMode -route_third_party_data true |
| 9 | setPlaceMode -place_opt_run_global_place | Controls the global placement behavior inside place_opt_design for ECO flows with an updated netlist. 'none' skips place_design and runs only preCTS optimization; 'seed' uses seed placement from concurrent macro placement or other sources and runs incremental standard cell placement then preCTS optimization | setPlaceMode -place_opt_run_global_place partial |
| 10 | setNanoRouteMode -route_high_freq_search_repair | Runs search and repair to remove violations for high frequency routing | setNanoRouteMode -route_high_freq_search_repair true |
| 11 | setPlaceMode -place_global_cpg_file | Sets the CPG (Consistent Placement Guidance) guide file containing macro placement constraints from a previous floorplan. When The option is specified, the CPG flow is turned ON automatically, allowing the tool to maintain macro positions from an earlier design version while accommodating netlist changes | setPlaceMode -place_global_cpg_file macroLocs.tcl |
| 12 | setNanoRouteMode -route_high_ freq_remove_floating_shield | Removes floating shield segments for high frequency nets | setNanoRouteMode -route_high_freq_remove_floating_shield true |
| 13 | setNanoRouteMode -routePGPinUseSignalRoute | Routes secondary power pins for low-power cells (AO buffers, SRPG, level shifters, isolation cells) using signal routing via nanoroute | setNanoRouteMode -routePGPinUseSignalRoute |
| 14 | setNanoRouteMode -route_high_ freq_num_reserved_layers | Sets the number of metal layers to reserve for high frequency routing above the standard cell area so that routing has more resources to access standard cell pins | setNanoRouteMode -route_high_freq_num_reserved_layers 2 |
| 15 | setOptMode -powerEffort | Sets the effort level for power-driven optimization during optDesign; controls whether power optimization is highest priority or secondary to timing | setOptMode -powerEffort minimal |
| 16 | setNanoRouteMode -route_high_ freq_match_report_file | Sets the name of the match report file for high frequency routing | setNanoRouteMode -route_high_freq_match_report_file report.txt |
| 17 | setOptMode -leakageToDynamicRatio | Sets the ratio of leakage to dynamic power optimization effort during optDesign; 1.0 = full leakage priority, 0.0 = full dynamic priority | setOptMode -leakageToDynamicRatio 0.8 |
| 18 | setDelayCalMode -SIAware | Enables or disables signal-integrity-aware delay calculation. Must be set to true when using routeDesign -trackOpt. If set to false when -trackOpt is specified, the software will error out | setDelayCalMode -SIAware true |
| 19 | setPlaceMode -place_global_aut o_blockage_in_channel | Automatically adds soft placement blockages in small channels between hard blocks to help resolve routing congestion. Soft blockages still accept buffers/inverters and CTS cells | setPlaceMode -place_global_auto_blockage_in_channel true |
| 20 | setNanoRouteMode -route_selected_net_only | Restricts routing to only selected nets. All nets with constraints will be routed by default in high frequency routing; setting this to true routes only specifically selected nets | setNanoRouteMode -route_selected_net_only true |
| 21 | setPlaceMode -place_detail_preroute_as_obs | Controls whether placement treats preroutes as routing blockages (obs). When true, standard cells are placed to avoid DRC violations against preroutes on all layers | setPlaceMode -place_detail_preroute_as_obs true |
| 22 | setNanoRouteMode -route_high_ freq_constraint_groups | Specifies which constraint groups to route using the NanoRoute High Frequency Router. Constraint groups can be: net (simple net), match (matched nets), bus (bus nets), pair (paired nets), or shield (shielded nets) | setNanoRouteMode -route_high_freq_constraint_groups {order net match bus pair shield} |
| 23 | setEndCapMode -leftBottomCornerEven | Sets the end cap cell to use for the left bottom corner with even site numbers during end cap insertion | |
| 24 | setNanoRouteMode -route_via_weight | Sets the priority weight for specific via types during multiple-cut via swapping, to raise their priority in via selection | setNanoRouteMode -route_via_weight "viaName viaWeight" |
| 25 | setEndCapMode -leftBottomCornerOdd | Sets the end cap cell to use for the left bottom corner with odd site numbers during end cap insertion | |
| 26 | setNanoRouteMode -route_detail _post_route_swap_via | Sets the via swapping type for post-route via optimization. Setting to 'multiCut' enables multi-cut via swapping during routeDesign -viaOpt | setNanoRouteMode -route_detail_post_route_swap_via multiCut |
| 27 | setEndCapMode -leftBottomEdgeEven | Sets the end cap cell to use for the left bottom edge with even site numbers | |
| 28 | setAnalysisMode -cppr | Enables Clock Path Pessimism Removal (CPPR) for timing analysis. 'both' applies CPPR to both setup and hold analysis | setAnalysisMode -analysisType onChipVariation -cppr both |
| 29 | setEndCapMode -leftBottomEdgeOdd | Sets the end cap cell to use for the left bottom edge with odd site numbers | |
| 30 | setAnalysisMode -analysisType | Sets the timing analysis type. onChipVariation enables OCV analysis which accounts for on-chip process variation | setAnalysisMode -analysisType onChipVariation -cppr both |
| 31 | setEndCapMode -leftEdgeEven | Sets the end cap cell for the left edge with even site numbers | |
| 32 | setDelayCalMode -SIAware | Enables or disables SI-aware delay calculation mode for timing analysis and optimization | setDelayCalMode -SIAware true |
| 33 | setEndCapMode -leftEdgeOdd | Sets the end cap cell for the left edge with odd site numbers | |
| 34 | setExtractRCMode -tQuantusModelFile | Sets the TQuantus model file for use during timeDesign and optDesign -postRoute optimization. If not specified, the file is generated automatically | setExtractRCMode -engine postRoute -effortLevel medium -tQuantusModelFile tQuantus_model.bin |
| 35 | setEndCapMode -leftTopCornerEven | Sets the end cap cell for the left top corner with even site numbers | |
| 36 | setExtractRCMode -effortLevel | Sets the effort level for RC extraction | setExtractRCMode -engine postRoute -effortLevel medium -tQuantusModelFile tQuantus_model.bin |
| 37 | setEndCapMode -leftTopCornerOdd | Sets the end cap cell for the left top corner with odd site numbers | |
| 38 | setExtractRCMode -engine | Sets the RC extraction engine to use. postRoute selects the postroute extraction engine | setExtractRCMode -engine postRoute -effortLevel medium -tQuantusModelFile tQuantus_model.bin |
| 39 | setEndCapMode -leftTopEdgeEven | Sets the end cap cell for the left top edge with even site numbers | |
| 40 | setNanoRouteMode -route_diode _insertion_for_clock_nets | Enables antenna diode insertion specifically for clock nets | setNanoRouteMode -route_diode_insertion_for_clock_nets true |
| 41 | setEndCapMode -leftTopEdgeOdd | Sets the end cap cell for the left top edge with odd site numbers | |
| 42 | setNanoRouteMode -route_antenna_diode_insertion | Enables insertion of antenna diode cells to repair process antenna violations | setNanoRouteMode -route_antenna_diode_insertion true |
| 43 | setEndCapMode -rightBottomCornerEven | Sets the end cap cell for the right bottom corner with even site numbers | |
| 44 | setNanoRouteMode -route_ignor e_antenna_top_cell_pin | Ignores antenna violations on top-cell pins during antenna repair | setNanoRouteMode -route_ignore_antenna_top_cell_pin true |
| 45 | setEndCapMode -rightBottomCornerOdd | Sets the end cap cell for the right bottom corner with odd site numbers | |
| 46 | setNanoRouteMode -route_antenna_cell_name | Sets the name of the antenna diode cell to be inserted when repairing process antenna violations | setNanoRouteMode -route_antenna_cell_name "ANTENNA" |
| 47 | setEndCapMode -rightBottomEdgeEven | Sets the end cap cell for the right bottom edge with even site numbers | |
| 48 | setNanoRouteMode -route_detail_fix_antenna | Enables repair of process antenna violations during detailed routing by layer hopping during postroute optimization | setNanoRouteMode -route_detail_fix_antenna true |
| 49 | setEndCapMode -enable_shrink _physical_cell_flow | Enables the shrink physical cell flow for S3 and S2 process nodes. Adds endcap cells with tap function inside. The p-tap and n-tap function cells are added alternately | setEndCapMode -enable_shrink_physical_cell_flow true |
| 50 | setNanoRouteMode -route_antenna_diode_insertion | Controls whether the router inserts diode cells during antenna violation repair. When false, forces more layer changing (antenna stapling) and skips diode insertion | setNanoRouteMode -route_antenna_diode_insertion true |
| 51 | setEndCapMode -leftEdge | Sets the left edge endcap cell pair (ntap_cell and ptap_cell). Cells are added together by turn from bottom to top | setEndCapMode -leftEdge {ntap_cell ptap_cell} |
| 52 | setNanoRouteMode -route_antenna_cell_name | Sets the diode cell name used to repair process antenna violations. The router inserts these diode cells as close as possible to input gates | setNanoRouteMode -route_antenna_cell_name |
| 53 | setEndCapMode -rightEdge | Sets the right edge endcap cell pair (ntap_cell and ptap_cell) | setEndCapMode -rightEdge {ntap_cell ptap_cell} |
| 54 | setNanoRouteMode -route_strict_honor_route_rule | Forces the router to strictly honor non-default routing rules (NDR). When true, NDR rules are treated as hard rules. When false, the router attempts to honor NDR but allows short hot spots without detouring | setNanoRouteMode -route_strict_honor_route_rule true |
| 55 | setEndCapMode -leftEdgeBottomBorder | Specifies endcap cells for the left edge bottom border | setEndCapMode -leftEdgeBottomBorder {ntap_cell ptap_cell} |
| 56 | setNanoRouteMode -route_detail _no_taper_on_output_pin | Specifies that the NanoRoute router should not taper wide wires when connecting to output pins of standard cells, macro cells, or block output pins | setNanoRouteMode -route_detail_no_taper_on_output_pin true |
| 57 | setEndCapMode -leftEdgeTopBorder | Specifies endcap cells for the left edge top border | setEndCapMode -leftEdgeTopBorder {ntap_cell ptap_cell} |
| 58 | setNanoRouteMode -route_conc urrent_minimize_via_count_effort | Sets the effort for concurrent via count minimization during routing | setNanoRouteMode -route_concurrent_minimize_via_count_effort medium |
| 59 | setEndCapMode -rightEdgeBottomBorder | Specifies endcap cells for the right edge bottom border | setEndCapMode -rightEdgeBottomBorder {ntap_cell ptap_cell} |
| 60 | setNanoRouteMode -route_detail _use_multi_cut_via_effort | Sets the effort level for multi-cut (double/triple-cut) via insertion during routing | setNanoRouteMode -route_detail_use_multi_cut_via_effort maximum |
| 61 | setEndCapMode -rightEdgeTopBorder | Specifies endcap cells for the right edge top border | setEndCapMode -rightEdgeTopBorder {ntap_cell ptap_cell} |
| 62 | setNanoRouteMode -route_via_weight | Sets the priority weight for a specific via; higher weight = higher priority for via selection during routing | setNanoRouteMode -route_via_weight {viaName viaWeight} |
| 63 | set_well_tap_mode -bottom_termination_cell | Sets the bottom termination cell, which has both p-tap and n-tap functions inside | set_well_tap_mode -bottom_termination_cell cellName -top_termination_cell cellName |
| 64 | setNanoRouteMode -route_detail _post_route_swap_via | Controls postroute via swapping optimization to improve via count or quality | setNanoRouteMode -route_detail_post_route_swap_via true |
| 65 | set_well_tap_mode -top_termination_cell | Sets the top termination cell, which has both p-tap and n-tap functions inside | set_well_tap_mode -bottom_termination_cell cellName -top_termination_cell cellName |
| 66 | setNanoRouteMode -route_via_weight | Sets the via name and weight to raise priority for specific vias during multiple-cut via swapping | setNanoRouteMode -route_via_weight "viaName viaWeight" |
| 67 | setEndCapMode -enable_shrink _physical_cell_flow | Enables the shrink physical cell flow. When enabled, the two cells specified using set_well_tap_mode -column_cell are treated as one group | setEndCapMode -enable_shrink_physical_cell_flow true |
| 68 | setNanoRouteMode -route_with_timing_driven | Enables timing-driven routing. When set to false, routing proceeds without timing-driven optimization | setNanoRouteMode -route_with_timing_driven true |
| 69 | setEndCapMode -enable_shrink _physical_cell_flow | Enables the shrink physical cell flow for ENDCAP and WellTap cell insertion | setEndCapMode -enable_shrink_physical_cell_flow true |
| 70 | setNanoRouteMode -route_detail _post_route_swap_via | Sets the type of via swapping to perform during post-route via optimization. Setting to multiCut enables multiple-cut via insertion | setNanoRouteMode -route_detail_post_route_swap_via multiCut |
| 71 | set_well_tap_mode -tap_function_cells | Sets the tap function cells to be used in the shrink physical cell flow; design must be covered by all specified tap function cells | set_well_tap_mode -tap_function_cells {A B C D} |
| 72 | setNanoRouteMode -route_with_timing_driven | Enables or disables timing-driven routing. Set to false for non-timing-driven postroute single-cut to multiple-cut via swapping | setNanoRouteMode -route_with_timing_driven true |
| 73 | set_well_tap_mode -column_cell | Sets the column cell pair (ntap and ptap cells) for the shrink physical cell flow | set_well_tap_mode -column_cell {ntap_cell ptap_cell} |
| 74 | setNanoRouteMode -route_detail _post_route_swap_via | Sets the via swapping mode for postroute via optimization. 'multiCut' enables swapping of single-cut vias to multiple-cut vias | setNanoRouteMode -route_detail_post_route_swap_via multiCut |
| 75 | set_well_tap_mode -bottom_termination_cell | Sets the bottom termination cell for the shrink physical cell flow | set_well_tap_mode -bottom_termination_cell cellName |
| 76 | setNanoRouteMode -route_conc urrent_minimize_via_count_effort | Sets the effort level for minimizing via count during concurrent routing | setNanoRouteMode -route_concurrent_minimize_via_count_effort value |
| 77 | set_well_tap_mode -top_termination_cell | Sets the top termination cell for the shrink physical cell flow | set_well_tap_mode -top_termination_cell cellName |
| 78 | setNanoRouteMode -route_detail _min_slack_for_opt_wire | Sets the minimum slack threshold for wire optimization during postroute via reduction and optimization | setNanoRouteMode -route_detail_min_slack_for_opt_wire slack |
| 79 | setPlaceMode -place_global_mo dule_aware_spare | Ensures spare cells within hierarchical modules are kept within bounds of the hierarchy even if no constraint is explicitly set on it | setPlaceMode -place_global_module_aware_spare |
| 80 | setNanoRouteMode -route_detail _use_multi_cut_via_effort | Sets the effort level for inserting multiple-cut vias during detailed routing to achieve a high ratio of multi-cut to single-cut vias | setNanoRouteMode -route_detail_use_multi_cut_via_effort medium |
| 81 | setPlaceMode -place_global_ignore_spare | Instructs the software to disregard spare cell connections and distribute the spare cells evenly in the placement area, ignoring any connectivity-based clustering | setPlaceMode -place_global_ignore_spare true |
| 82 | setNanoRouteMode -route_detail _use_multi_cut_via_effort | Sets the effort level for using multiple-cut vias during detail routing. Setting to low conserves multi-cut via insertion during ECO routing | setNanoRouteMode -route_detail_use_multi_cut_via_effort minimal |
| 83 | setPlaceMode -place_global_mo dule_aware_spare | Controls placement of spare cells or modules when hierarchy is relevant; when true, spare cells respect their module hierarchy bounds | setPlaceMode -place_global_module_aware_spare true |
| 84 | setNanoRouteMode -route_with_eco | Enables ECO routing mode for NanoRoute. Must be set when performing ECO routing after multiple-cut via insertion on a fully routed design | setNanoRouteMode -route_with_eco true |
| 85 | setPlaceMode -place_global_mo dule_aware_spare | When set to true, spreads spare gates only within the bounds of the same module during placement, enabling hierarchy-aware spare cell placement | setPlaceMode -place_global_module_aware_spare true |
| 86 | setNanoRouteMode -route_with_eco | Enables ECO routing mode. Router completes partial routes while preserving existing wire segments as much as possible | setNanoRouteMode -route_with_eco true |
| 87 | setPlaceMode -place_global_mo dule_aware_spare | Enables placement of spare cells within the bounds of their specified hierarchy. When set to true, spare cells are placed within the bounds of their hierarchy as specified by the specifySpareGate command | setPlaceMode -place_global_module_aware_spare true |
| 88 | setNanoRouteMode -route_with_si_driven | Enables signal integrity-driven routing. Used together with -route_with_timing_driven to minimize crosstalk by controlling router priorities for timing, SI, and congestion | setNanoRouteMode -route_with_si_driven true |
| 89 | setPlaceMode -place_detail_pad_fixed_insts | Controls whether padding is applied to fixed instances during refinePlace; by default padding is ignored for fixed instances | setPlaceMode -place_detail_pad_fixed_insts true |
| 90 | setNanoRouteMode -route_with_timing_driven | Enables timing-driven routing. Together with -route_with_si_driven, fine-tunes the priorities the router assigns to timing, signal integrity, and congestion to minimize crosstalk | setNanoRouteMode -route_with_timing_driven true |
| 91 | setPlaceMode -place_global_module_padding | Adds padding within hierarchical modules by spreading out standard cell instances. The padding factor is applied to the instance area of all cells within the module. A factor of 1.2 increases area by 20% | setPlaceMode -place_global_module_padding module 1.2 |
| 92 | setNanoRouteMode -route_with_timing_driven | Enables timing-driven routing using the Common Timing Engine (CTE); generates .timingfile.tif for use during routing | setNanoRouteMode -route_with_timing_driven true |
| 93 | setPlaceMode -place_global_clo ck_power_driven | Reduces switching power on power-critical nets during global placement by using power-driven placement optimization | setPlaceMode -place_global_clock_power_driven true |
| 94 | setDesignMode -topRoutingLayer | Sets the top routing layer for the router. If set too low relative to a pin layer, via stacking may be required, causing open nets if disallowed | setDesignMode -topRoutingLayer |
| 95 | setPlaceMode -place_global_cong_effort | Sets the congestion effort level for global placement. Use 'high' when design is congested | setPlaceMode -place_global_cong_effort maximum |
| 96 | setDesignMode -bottomRoutingLayer | Sets the bottom routing layer for the router. If set too high relative to a pin layer, via stacking may be required which can cause open nets if via stacking is not allowed | setDesignMode -bottomRoutingLayer |
| 97 | setPlaceMode -place_global_module_padding | Adds padding around specified modules to address local congestion issues during global placement | setPlaceMode -place_global_module_padding module factor |
| 98 | setNanoRouteMode -route_with_ via_only_for_stdcell_pin | When set to true, restricts routing to via-only access for standard cell pins. If no via access exists in a pin, this causes open net violations | setNanoRouteMode -route_with_via_only_for_stdcell_pin true |
| 99 | setMultiCpuUsage -acquireLicense | Sets the number of multiple-CPU licenses to check out before running multi-threaded placement | setMultiCpuUsage [-acquireLicense integer] [-localCpu {integer | max}] [-licenseList licenses] |
| 100 | setNanoRouteMode -route_detail_end_iteration | Controls the end iteration for detailed routing. Iteration 0 skips search-and-repair. Higher values perform more search-and-repair passes with growing switch box sizes. 'default' enables postroute optimization and additional search-and-repair | setNanoRouteMode -route_detail_end_iteration 0 setNanoRouteMode -route_detail_end_iteration 1 setNanoRouteMode -route_detail_end_iteration 19 setNanoRouteMode -route_detail_end_iteration default |
| 101 | setMultiCpuUsage -localCpu | Sets the maximum number of threads to use for multi-threading. If more threads than available CPUs are requested, software uses the available maximum | setMultiCpuUsage -localCpu {integer | max} |
| 102 | setNanoRouteMode -route_route_clock_nets_first | Controls whether routeDesign routes clock nets before routing other nets. By default, routeDesign routes clock nets first. Set to false to disable this behavior | setNanoRouteMode -route_route_clock_nets_first true |
| 103 | setMultiCpuUsage -licenseList | Sets the license check-out order for multi-CPU processing | setMultiCpuUsage [-acquireLicense integer] [-localCpu {integer | max}] [-licenseList licenses] |
| 104 | setNanoRouteMode -route_fix_clock_nets | Keeps clock nets' status as FIXED so routeDesign cannot modify them during routing. By default, routeDesign changes clock net status from FIXED to ROUTED and routes them before routing other nets | setNanoRouteMode -route_fix_clock_nets true |
| 105 | setMultiCpuUsage -keepLicense | Controls whether additional CPU licenses are retained after global placement completes | setMultiCpuUsage -keepLicense true |
| 106 | setNanoRouteMode -route_with_si_driven | Enables signal integrity-driven routing mode. The routeDesign command enables this by default (SMART routing). For other routing commands, this must be explicitly set to true | setNanoRouteMode -route_with_si_driven true |
| 107 | setMultiCpuUsage -releaseLicense | Releases the additional multi-CPU licenses acquired for placement after global placement completes | setMultiCpuUsage -releaseLicense |
| 108 | setNanoRouteMode -route_with_timing_driven | Enables timing-driven routing mode. The routeDesign command enables this by default (SMART routing). For globalRoute, detailRoute, or globalDetailRoute commands, this must be explicitly set to true | setNanoRouteMode -route_with_timing_driven true |
| 109 | setPlaceMode -place_global_reorder_scan | Controls whether scan chain reordering is performed during placement. When set to false, the software does not reorder scan chains, so the DEF file will not include the +ORDERED statement in the SCANCHAINS section | setPlaceMode -place_global_reorder_scan true |
| 110 | setNanoRouteMode -route_with_si_driven | Enables signal-integrity-driven routing and postroute optimization. When set to true, the router repairs SI violations on specified nets during postroute optimization | setNanoRouteMode -route_with_si_driven true |
| 111 | setPlaceMode -place_global_ignore_scan | Instructs the placer to ignore scan connections during placement, preventing scan chain connectivity from influencing cell placement | setPlaceMode -place_global_ignore_scan true |
| 112 | setAttribute -preferred_routing_layer_effort | Sets the effort level for honoring preferred routing layer limits for specific nets | setAttribute -net netName -preferred_routing_layer_effort maximum |
| 113 | setScanReorderMode -skipMode | Controls which cells are skipped during scan chain reordering; skipNone reorders all, skipBuffer skips buffers, skipFloatingBuffer skips floating buffers | setScanReorderMode -skipMode skipNone |
| 114 | setAttribute -top_preferred_routing_layer | Sets the soft preferred top routing layer limit for specific nets | setAttribute -net netName -top_preferred_routing_layer METAL6 |
| 115 | setEndCapMode -barrier_border_cell_bottom_y | Sets the bottom Y coordinate for the barrier border cell when adding break termination cells along with endcap cells | setEndCapMode -barrier_border_cell_bottom_y |
| 116 | setAttribute -bottom_preferred_routing_layer | Sets the soft preferred bottom routing layer limit for specific nets; router attempts to stay above this layer but may route below if necessary | setAttribute -net netName -bottom_preferred_routing_layer METAL2 |
| 117 | setEndCapMode -barrier_border_cell_top_y | Sets the top Y coordinate for the barrier border cell when adding break termination cells along with endcap cells | setEndCapMode -barrier_border_cell_top_y |
| 118 | setDesignMode -topRoutingLayer | Sets the hard top routing layer limit; all nets are routed at or below this layer | setDesignMode -topRoutingLayer METAL6 |
| 119 | setEndCapMode -barrier_cell_x | Sets the X coordinate for the barrier cell when adding break termination cells along with endcap cells | setEndCapMode -barrier_cell_x |
| 120 | setDesignMode -bottomRoutingLayer | Sets the hard bottom routing layer limit; all nets are routed at or above this layer, using stacked vias to reach pins below | setDesignMode -bottomRoutingLayer METAL2 |
| 121 | setEndCapMode -barrier_cell_xy | Sets the XY coordinates for the barrier cell when adding break termination cells along with endcap cells | setEndCapMode -barrier_cell_xy |
| 122 | setOptMode -opt_icg_enable_pin_rebuffering | Controls rebuffering of nets to enable pins of inverting clock gate (ICG) instances after clock tree insertion. When set to true, rebuffers all ICG enable nets; when set to auto, rebuffers only affected ICG enable nets; when false, disables the feature | setOptMode -opt_icg_enable_pin_rebuffering manual |
| 123 | setEndCapMode -barrier_cell_y | Sets the Y coordinate for the barrier cell when adding break termination cells along with endcap cells | setEndCapMode -barrier_cell_y |
| 124 | setTieHiLoMode -cell | Sets the tie-hi and tie-lo cells that can be inserted in place of filler/decap cells during hold optimization | setTieHiLoMode -cell {{GATIELO GATIEHI}} |
| 125 | setEndCapMode -barrier_pitch | Sets the pitch for the barrier cell when adding break termination cells along with endcap cells | setEndCapMode -barrier_pitch |
| 126 | setSignoffOptMode -useGaFillerList | Sets the list of GA filler cell types that are allowed to be removed and re-inserted during signoff hold optimization for metal ECO | setSignoffOptMode -useGaFillerList {GFILL1BWP GFILL2BWP GFILL4BWP GFILL10BWP} |
| 127 | setEndCapMode -barrier_termination_bottom_y | Sets the bottom Y coordinate for the barrier termination cell when adding break termination cells along with endcap cells | setEndCapMode -barrier_termination_bottom_y |
| 128 | setSignoffOptMode -postMask | Enables post-mask ECO mode for signoff optimization, which allows use of Gate Array (GA) filler cells for metal ECO | setSignoffOptMode -postMask true |
| 129 | setEndCapMode -barrier_termination_top_y | Sets the top Y coordinate for the barrier termination cell when adding break termination cells along with endcap cells | setEndCapMode -barrier_termination_top_y |
| 130 | setOptMode -opt_one_pass_lec | Enables the one pass logical equivalence check (LEC) flow. Allows RTL-to-netlist comparison between RTL and any PnR stage netlist in a single step | setOptMode -opt_one_pass_lec |
| 131 | setEndCapMode -barrier_termination_x | Sets the X coordinate for the barrier termination cell when adding break termination cells along with endcap cells | setEndCapMode -barrier_termination_x |
| 132 | setMultiCpuUsage -cpuPerRemoteHost | Number of CPUs per remote host for distributed parallel processing | setMultiCpuUsage -localCpu 16 -remoteHost 3 -cpuPerRemoteHost 8 |
| 133 | setEndCapMode -barrier_y_mode | Sets the Y mode for the barrier when adding break termination cells along with endcap cells | setEndCapMode -barrier_y_mode |
| 134 | setMultiCpuUsage -remoteHost | Number of remote hosts to use for distributed parallel processing | setMultiCpuUsage -localCpu 16 -remoteHost 3 -cpuPerRemoteHost 8 |
| 135 | set_ccopt_property -net_type | Assigns a route type to clock tree nets of a specific net type (leaf, trunk, top). Binds a non-default routing rule and preferred routing layers to that net type | set_ccopt_property -net_type leaf route_type leaf_rule |
| 136 | setMultiCpuUsage -localCpu | Number of local CPUs to use for parallel processing during signoff optimization | setMultiCpuUsage -localCpu 16 -remoteHost 3 -cpuPerRemoteHost 8 |
| 137 | set_ccopt_property -net_type top route_type | Specifies routing rules for clock tree nets of a given net type; sets top routing rules for top net type | set_ccopt_property -net_type top route_type top_rule |
| 138 | setSignoffOptMode -setupRecovery | When set to true, enables setup timing recovery mode during signoff optimization after PBA-based hold fixing | setSignoffOptMode -loadEcoOptDb ECO-DB-PBA2 -setupRecovery true |
| 139 | set_ccopt_property routing_top_min_fanout | Sets the minimum transitive sink fanout count for a net to be classified as a top routing net | set_ccopt_property routing_top_min_fanout 10000 |
| 140 | setSignoffOptMode -loadEcoOptDb | Loads a previously saved ECO optimization database for use in signoff optimization without re-running signoff STA | setSignoffOptMode -loadEcoOptDb ECO-DB-PBA |
| 141 | set_ccopt_property buffer_cells | Specifies a Tcl list of symmetric buffer cells to use for CTS across all clock trees and power domains | set_ccopt_property buffer_cells {BUFX12 BUFX8 BUFX6 BUFX4 BUFX2} |
| 142 | setSignoffOptMode -saveEcoOptDb | Sets the name of the ECO optimization database to save after signoff timing analysis, for use in subsequent optimization runs | setSignoffOptMode -saveEcoOptDb ECO-DB-PBA |
| 143 | set_ccopt_property inverter_cells | Specifies a Tcl list of inverter cells to use for CTS across all clock trees and power domains | set_ccopt_property inverter_cells {INVX12 INVX8 INVX6 INVX4 INVX2} |
| 144 | setSignoffOptMode -nworst | Sets the number of worst timing paths per endpoint to consider during signoff optimization | setSignoffOptMode -nworst 50 |
| 145 | set_ccopt_property clock_gating_cells | Specifies a Tcl list of clock gating cells to use for CTS | set_ccopt_property clock_gating_cells {PREICGX12 PREICG8 PREICGX6 PREICGX4} |
| 146 | setSignoffOptMode -max_paths | Sets the maximum number of timing paths to consider during signoff optimization analysis | setSignoffOptMode -max_slack 10 -max_paths 10000000 -nworst 50 |
| 147 | set_ccopt_property use_inverters | Specifies that CTS should prefer inverters over buffers when building the clock tree | set_ccopt_property use_inverters true |
| 148 | setSignoffOptMode -max_slack | Sets the maximum slack threshold (in ns) for paths to include in signoff optimization; paths with slack above this value are excluded | setSignoffOptMode -max_slack 10 -max_paths 10000000 -nworst 50 |
| 149 | set_ccopt_property target_max_trans | Sets up the maximum transition target for clock tree synthesis | set_ccopt_property target_max_trans 100ps |
| 150 | setSignoffOptMode -pbaEffort | Sets the PBA (Path-Based Analysis) effort level for signoff optimization; high effort uses more complex techniques to improve timing results | setSignoffOptMode -pbaEffort maximum |
| 151 | set_ccopt_property target_skew | Sets up the skew target for CCOpt-CTS (ccopt_design -cts only; ignored by full CCOpt ccopt_design) | set_ccopt_property target_skew 50ps |
| 152 | setSignoffOptMode -checkType | Sets the type of timing checks to perform during signoff optimization (setup, hold, or both) | setSignoffOptMode -retime aocv_path_slew_propagation -checkType both |
| 153 | setDesignMode -earlyClockFlow | Enables the early clock flow inside place_opt_design; causes CCOpt to create clock trees during placement based on initial clustering and annotate clock latencies for timing optimization | setDesignMode -earlyClockFlow true |
| 154 | setSignoffOptMode -retime | Sets the retiming mode for PBA (Path-Based Analysis) signoff optimization, controlling how AOCV path slew propagation is applied | setSignoffOptMode -retime aocv_path_slew_propagation -checkType both |
| 155 | setOptMode -opt_enable_podv2 _clock_opt_flow | Enables the PODV2 clock_opt_design flow; when true, clock_opt_design is used after place_opt_design V2; when false, uses place_opt_design + ccopt_design flow | setOptMode -opt_enable_podv2_clock_opt_flow true |
| 156 | setSignoffOptMode -fixMaxCap | Controls whether maximum capacitance violations are fixed during signoff DRV optimization | setSignoffOptMode -fixMaxCap true |
| 157 | setOptMode -opt_podv2_flow_effort | Sets effort level for the PODV2 optimization flow: auto follows flowEffort setting, standard is fast preCTS, extreme pursues best PPA with high runtime | setOptMode -opt_podv2_flow_effort ultra |
| 158 | setSignoffOptMode -fixMaxTran | Controls whether maximum transition violations are fixed during signoff DRV optimization | setSignoffOptMode -fixMaxTran true |
| 159 | setDesignMode -flowEffort | Sets overall flow effort; when opt_podv2_flow_effort is auto, this setting drives PODV2 effort level | setDesignMode -flowEffort balanced |
| 160 | setSignoffOptMode -loadIrdropDb | Loads an IR drop database for use during signoff DRV fixing that accounts for IR drop voltage variation | setSignoffOptMode -loadIrdropDb my_ir_db |
| 161 | set_ccopt_property buffer_cells | A Tcl list of symmetric buffer cells. All buffers created in the clock tree under a power domain will be instances of these cells. Can be set globally, per clock tree, or per clock tree and power domain | set_ccopt_property buffer_cells {bufA bufB bufC} |
| 162 | setSignoffOptMode -fixIrDrop | Enables fixing of IR drop voltage violations for all instances in the design without creating DRV violations during signoff optimization | setSignoffOptMode -fixIrDrop true |
| 163 | set_ccopt_property inverter_cells | Specifies inverter cells for CTS. Used per clock tree or power domain as needed | set_ccopt_property inverter_cells {invA invB} |
| 164 | setExtractRCMode -effortLevel | Sets the effort level for RC extraction | setExtractRCMode -coupled true -engine postRoute -effortLevel medium |
| 165 | set_ccopt_property clock_gating_cells | Specifies clock gating cells for CTS. Recommended to explicitly configure | set_ccopt_property clock_gating_cells {cgcellA cgcellB} |
| 166 | setExtractRCMode -engine | Sets the RC extraction engine to use | setExtractRCMode -coupled true -engine postRoute -effortLevel medium |
| 167 | set_ccopt_property logic_cells | Specifies logic cells for CTS. If not specified, CTS will use any library cell with the same logic function that is not dont_use when resizing existing logic cell instances | set_ccopt_property logic_cells {logicA logicB} |
| 168 | setExtractRCMode -coupled | Enables or disables coupled RC extraction during signoff optimization flow | setExtractRCMode -coupled true -engine postRoute -effortLevel medium |
| 169 | set_ccopt_property use_inverters | Specifies that CTS should prefer inverters to buffers when building clock trees | set_ccopt_property use_inverters true |
| 170 | setSignoffOptMode -preStaTcl | Specifies a Tcl script to be executed before signoff STA; allows applying or resetting any set*mode commands before signoff timing analysis | setSignoffOptMode -preStaTcl preStaTcl.tcl |
| 171 | setOptMode -opt_skew_ccopt | Sets the level of useful skew effort applied during ccopt_design or optDesign -postCTS commands. 'none' disables useful skew; 'standard' allows local clock tree modifications; 'extreme' enables concurrent clock/datapath optimization | setOptMode -opt_skew_ccopt ultra |
| 172 | setSignoffOptMode -postStaTcl | Specifies a Tcl script to be executed after signoff STA; used to apply post-STA settings or adjustments before signoff optimization | setSignoffOptMode -postStaTcl postStaTcl.tcl |
| 173 | setAnalysisMode -analysisType | Sets the timing analysis type. Must be set to onChipVariation (OCV) when using convert_lib_clock_tree_latencies, because the conversion process computes individual early and late network latency values | setAnalysisMode -analysisType onChipVariation |
| 174 | setMultiCpuUsage -cpuPerRemoteHost | Sets the number of CPUs per remote host for distributed parallel processing | setMultiCpuUsage -localCpu 4 -remoteHost 3 -cpuPerRemoteHost 4 |
| 175 | setOptMode -opt_fix_fanout_load | Enables fixing of fanout violations during timing optimization. Must be set before the first call to optDesign -preCTS and maintained through all optDesign calls up to optDesign -postRoute | setOptMode -opt_fix_fanout_load true |
| 176 | setMultiCpuUsage -remoteHost | Sets the number of remote hosts to use for distributed parallel processing during signoff optimization | setMultiCpuUsage -localCpu 4 -remoteHost 3 -cpuPerRemoteHost 4 |
| 177 | setOptMode -opt_enable_clock_ pulse_width_checks | Enables checking and fixing of minimum clock pulse width violations during timing optimization and CTS | setOptMode -opt_enable_clock_pulse_width_checks true |
| 178 | setMultiCpuUsage -localCpu | Sets the number of local CPUs to use for parallel processing during signoff optimization | setMultiCpuUsage -localCpu 4 -remoteHost 3 -cpuPerRemoteHost 4 |
| 179 | setDesignMode -flowEffort | Sets the flow effort level for design optimization. 'express' enables low-effort mode for rapid timing optimization during design prototyping | setDesignMode -flowEffort express |
| 180 | setSignoffOptMode -optimizeCoreOnly | When set to true, restricts hold/setup fixing to register-to-register paths only; timing for non-register-to-register paths is adjusted to 0 for the fixing mode | setSignoffOptMode -optimizeCoreOnly true |
| 181 | setOptMode -opt_skew | Enables useful skew optimization during timing optimization | setOptMode -opt_skew true -opt_skew_pre_cts true |
| 182 | setSignoffOptMode -setupRecovery | Enables setup timing recovery mode in signoff optimization, targeting only setup violations after power optimization | setSignoffOptMode -loadEcoOptDb ECO-DB-PBA2 -setupRecovery true |
| 183 | setOptMode -opt_skew_pre_cts | Enables useful skew optimization specifically in the preCTS mode | setOptMode -opt_skew true -opt_skew_pre_cts true |
| 184 | setSignoffOptMode -loadEcoOptDb | Sets the path to load a previously saved ECO optimization database for reuse in signoff optimization | setSignoffOptMode -loadEcoOptDb ECO-DB-PBA |
| 185 | setOptMode -opt_area_recovery | Controls area reclaiming during optDesign. When false, disables the area recovery step | setOptMode -opt_area_recovery true |
| 186 | setSignoffOptMode -saveEcoOptDb | Sets the path to save the ECO optimization database after signoff optimization completes | setSignoffOptMode -saveEcoOptDb ECO-DB-PBA |
| 187 | setAnalysisMode -clkSrcPath | Controls whether clock source path is included in timing analysis. optDesign sets this to false by default in preCTS mode and it cannot be overridden | setAnalysisMode -clkSrcPath true |
| 188 | setSignoffOptMode -deleteInst | Controls whether instances can be deleted during signoff optimization | setSignoffOptMode -deleteInst true |
| 189 | setAnalysisMode -clockPropagation | Controls clock propagation mode for timing analysis. optDesign forces this to forcedIdeal in preCTS mode and it cannot be overridden | setAnalysisMode -clockPropagation forcedIdeal |
| 190 | setSignoffOptMode -nworst | Sets the number of worst paths per endpoint to consider during signoff optimization | setSignoffOptMode -nworst 50 |
| 191 | setOptMode -opt_drv_margin | Sets a margin added to a dynamically calculated internal margin for DRV optimization. Positive value tightens constraints (multiplies max_cap and max_tran by 1-margin); negative value relaxes constraints | setOptMode -opt_drv_margin 0.2 |
| 192 | setSignoffOptMode -maxPaths | Sets the maximum number of paths to consider during signoff optimization | setSignoffOptMode -maxPaths 10000000 |
| 193 | setOptMode -opt_hold_target_slack | Sets a hold target slack value added to the dynamically calculated internal hold margin during optimization | setOptMode -opt_hold_target_slack 0.05 |
| 194 | setSignoffOptMode -maxSlack | Sets the maximum slack threshold in nanoseconds for paths considered during signoff optimization | setSignoffOptMode -maxSlack 10 |
| 195 | setOptMode -opt_setup_target_slack | Sets a setup target slack value added to the dynamically calculated internal setup margin during optimization | setOptMode -opt_setup_target_slack 0.0 |
| 196 | setSignoffOptMode -pbaEffort | Sets the path-based analysis (PBA) effort level during signoff optimization. High effort required for best power optimization QoR | setSignoffOptMode -pbaEffort maximum |
| 197 | setOptMode -opt_multi_bit_flop_opt | Enables or Sets up the Multi-Bit Flip-Flop (MBFF) optimization flow. Controls whether single-bit flops are merged into multi-bit flops and/or multi-bit flops are split into single-bit flops | setOptMode -opt_multi_bit_flop_opt true |
| 198 | setSignoffOptMode -retime | Sets the retiming method to use during signoff optimization | setSignoffOptMode -retime path_slew_propagation |
| 199 | setOptMode -opt_allow_multi_bit _on_flop_with_sdc | Controls whether SDC constraints are honored during MBFF merging and splitting operations | setOptMode -opt_allow_multi_bit_on_flop_with_sdc true |
| 200 | setSignoffOptMode -preStaTcl | Specifies a pre-STA Tcl script to run before signoff timing analysis during signoff optimization | setSignoffOptMode -preStaTcl preStaTcl.cl |
| 201 | setOptMode -opt_multi_bit_flop_ split_timing_effort | Sets the timing effort level for multi-bit flip-flop (MBFF) splitting. Low=split only for critical paths; medium=split for more critical paths to remove bottlenecks; high=aggressive splitting to improve timing | setOptMode -opt_multi_bit_flop_split_timing_effort {minimal | medium | maximum} |
| 202 | setMultiCpuUsage -cpuPerRemoteHost | Sets the number of CPUs to use on each remote host machine during distributed processing | setMultiCpuUsage -localCpu 16 -remoteHost 3 -cpuPerRemoteHost 8 |
| 203 | setOptMode -opt_multi_bit_flop_ merge_timing_effort | Sets the timing effort level for multi-bit flip-flop (MBFF) merging. Low=allow timing degradation for merging; medium=merge with minimal degradation; high=merge only if timing maintained or improved | setOptMode -opt_multi_bit_flop_merge_timing_effort {minimal | medium | maximum} |
| 204 | setMultiCpuUsage -remoteHost | Sets the number of remote host machines to use for distributed processing during signoff optimization | setMultiCpuUsage -localCpu 16 -remoteHost 3 -cpuPerRemoteHost 8 |
| 205 | setOptMode -opt_multi_bit_flop_reorder_bits | Enables reordering of bits in mixed-drive-strength multi-bit cells (MDS) to achieve better timing and/or power optimization | setOptMode -opt_multi_bit_flop_reorder_bits {true | true | timing | power} |
| 206 | setMultiCpuUsage -localCpu | Sets the number of local CPU threads to use for signoff power optimization | setMultiCpuUsage -localCpu 16 -remoteHost 3 -cpuPerRemoteHost 8 |
| 207 | setOptMode -opt_multi_bit_flop_reorder_bits | When set to true, power, or timing, adds a 'Bit-Strength (strong to weak)' column in multi-bit flip-flop reports generated by reportMultibit -cell, for mixed drive strength MBFF cells used in bit-swapping | setOptMode -opt_multi_bit_flop_reorder_bits true |
| 208 | setMultiCpuUsage -cpuPerRemoteHost | Sets the number of CPUs to use on each remote host for distributed processing | setMultiCpuUsage -localCpu 16 -remoteHost 4 -cpuPerRemoteHost 4 |
| 209 | setOptMode -opt_multi_bit_unused_bits | Controls whether single-bit registers can be merged into multi-bit instances that have unused bits. At prePlace stage (default), merging without unused bits is attempted. When true, allows merging with unused bits at both prePlace and preCTS stages. When false, prevents any merging that results in unused bits | setOptMode -opt_multi_bit_unused_bits true |
| 210 | setMultiCpuUsage -remoteHost | Sets the number of remote hosts to use for distributed multi-CPU processing | setMultiCpuUsage -localCpu 16 -remoteHost 4 -cpuPerRemoteHost 4 |
| 211 | setOptMode -opt_multi_bit_unused_bit_count | Sets the maximum number of unused bits allowed in each multi-bit cell during register merging. Only effective when -opt_multi_bit_unused_bits is set to true | setOptMode -opt_multi_bit_unused_bits true -opt_multi_bit_unused_bit_count 2 |
| 212 | setSignoffOptMode -loadEcoOptDb | Loads a previously saved ECO optimization database | setSignoffOptMode -loadEcoOptDb ECO-DB-PBA |
| 213 | setOptMode -opt_multi_bit_flop_ merge_bank_label_inference | Enables soft merging of multi-bit flip-flops using bank label inference; allows specifying a group of instances with the same label for MBFF merging | setOptMode -opt_multi_bit_flop_merge_bank_label_inference true |
| 214 | setSignoffOptMode -saveEcoOptDb | Saves the ECO optimization database to the specified path for later reuse | setSignoffOptMode -saveEcoOptDb ECO-DB-PBA |
| 215 | setOptMode -opt_multi_bit_flop_ merge_bank_label_inference | Controls hard merging mode for multi-bit flip-flop merging; set to false to enable hard merging which requires explicit mapToMultibitBankLabel and mapToMultibitRegister attributes | setOptMode -opt_multi_bit_flop_merge_bank_label_inference true |
| 216 | setSignoffOptMode -pbaEffort | Sets the PBA optimization effort level | setSignoffOptMode -pbaEffort maximum |
| 217 | setOptMode -opt_multi_bit_comb inational_mode | Enables user-specific multi-bit combinational cell (MBCC) merging and splitting based on area and power. 'auto' uses area if power effort is none, otherwise power; 'power' uses power; 'area' uses area | setOptMode -opt_multi_bit_combinational_mode manual |
| 218 | setSignoffOptMode -nworst | Sets the number of paths to be retimed per endpoint | setSignoffOptMode -nworst 50 |
| 219 | setOptMode -opt_multi_bit_combinational_opt | Enables and disables the multi-bit combinational flow called as part of the pre-CTS optimization stage | setOptMode -opt_multi_bit_combinational_opt splitOnly |
| 220 | setSignoffOptMode -maxPaths | Sets the maximum total number of paths to be retimed | setSignoffOptMode -maxPaths 5000000 |
| 221 | setOptMode -opt_multi_bit_comb inational_merge_timing_effort | Sets the timing effort level for multi-bit combinational cell merging. Controls how aggressively timing is considered during MBCC merging | setOptMode -opt_multi_bit_combinational_merge_timing_effort medium |
| 222 | setSignoffOptMode -maxSlack | Sets the maximum slack value (in DB timing units) to be considered for retiming. Paths with slack below this value are retimed | setSignoffOptMode -maxSlack 10 |
| 223 | setOptMode -opt_multi_bit_comb inational_split_timing_effort | Sets the timing effort level for multi-bit combinational cell splitting during pre-CTS optimization | setOptMode -opt_multi_bit_combinational_split_timing_effort minimal |
| 224 | setSignoffOptMode -checkType | Selects whether PBA optimization is applied to Setup, Hold, or both check types | setSignoffOptMode -checkType both |
| 225 | setOptMode -opt_report_multi_bi t_unmerged_reasons | Enables reporting of the reasons why multibit flops/latches were not merged in the MBFF summary report | setOptMode -opt_report_multi_bit_unmerged_reasons true |
| 226 | setSignoffOptMode -retime | Selects the retiming mode for PBA (Path-Based Analysis) signoff optimization | setSignoffOptMode -retime path_slew_propagation |
| 227 | setOptMode -opt_fix_fanout_load | Enables repair of fanout violations during optDesign. By default, optDesign does not correct fanout violations. Run before optDesign from the first call of optDesign -preCTS up to the last call of optDesign -postRoute | setOptMode -opt_fix_fanout_load true |
| 228 | setAnalysisMode -caseAnalysis | Enables or disables propagation of set_case_analysis constant values during timing optimization. When false, timing optimization is run on constant nets (which normally have 0 delay) | setAnalysisMode -caseAnalysis true |
| 229 | setOptMode -opt_hold_ignore_path_groups | Instructs the software to exclude specified path groups from hold fixing during optDesign -postCTS -hold and optDesign -postRoute -hold | setOptMode -opt_hold_ignore_path_groups pathGroupName |
| 230 | setAnalysisMode -cppr | Enables Clock Path Pessimism Removal (CPPR). Highly recommended when using OCV mode for postRoute hold optimization | setAnalysisMode -analysisType onChipVariation -cppr |
| 231 | setOptMode -opt_area_recovery | Enables area recovery during incremental post-CTS optimization to optimize setup time and reduce area | setOptMode -opt_area_recovery true |
| 232 | setAnalysisMode -analysisType | Sets the timing analysis type for OCV-based postRoute hold optimization | setAnalysisMode -analysisType onChipVariation -cppr |
| 233 | setOptMode -opt_skew | Enables or disables useful skew optimization during post-CTS timing optimization | setOptMode -opt_skew true |
| 234 | setOptMode -opt_post_route_art_flow | Enables optimization using an active logic view (ART) at the post-Route stage, honoring floorplan fence constraints when moving or adding cells | setOptMode -opt_post_route_art_flow true |
| 235 | setOptMode -opt_skew_ccopt | Enables CCOpt-based useful skew scheduling during incremental post-CTS optimization | setOptMode -opt_skew true -opt_skew_ccopt true |
| 236 | setMultiCpuUsage -localCpu | Sets the number of local CPU threads for distributed setup and hold timing analysis during hold fixing | setMultiCpuUsage -localCpu number |
| 237 | setOptMode -opt_route_opt_recovery | Controls the timing recovery step in the route_opt_design flow; determines when hold/DRV recovery is triggered | setOptMode -opt_route_opt_recovery true |
| 238 | setUsefulSkewMode -opt_skew_max_allowed_delay | Sets the maximum delay the software can borrow from neighboring flip-flops when performing useful skew. Controls the global limit on skew borrowing to prevent excessive hold violations and sign-off mismatches | setUsefulSkewMode -opt_skew_max_allowed_delay 0\.6 |
| 239 | setOptMode -opt_post_route_setup_recovery | Enables setup timing recovery in post-route optimization | setOptMode -opt_post_route_setup_recovery true |
| 240 | setUsefulSkewMode -opt_skew_no_boundary | Excludes boundary sequential cells from useful skew calculations. When true, only non-boundary cells are used in useful skew computations. By default (false), boundary cells and ordinary sequential elements are both considered | setUsefulSkewMode -opt_skew_no_boundary true |
| 241 | setOptMode -opt_post_route_hold_recovery | Enables hold timing recovery in post-route optimization | setOptMode -opt_post_route_hold_recovery true |
| 242 | setOptMode -opt_skew_post_route | Enables or disables post-Route useful skew optimization within optDesign -postRoute. When true (default), post-Route optimization includes instance sizing and buffer/inverter insertion in the clock tree to improve setup timing | setOptMode -opt_skew_post_route true |
| 243 | setOptMode -opt_post_route_drv_recovery | Enables DRV (Design Rule Violation) recovery in post-route optimization | setOptMode -opt_post_route_drv_recovery true |
| 244 | setOptMode -opt_skew_ccopt | Specifies useful skew effort level for post-CTS optimization via ccopt_design. 'none': no skewing; 'standard': instance sizing/buffering in clock tree; 'extreme': multiple phases of concurrent clock and datapath optimization | setOptMode -opt_skew_ccopt balanced |
| 245 | setAnalysisMode -analysisType | Sets the timing analysis type; onChipVariation enables OCV for GigaOpt post-route flow | setAnalysisMode -analysisType onChipVariation -cppr both |
| 246 | setOptMode -opt_skew_pre_cts | Enables or disables pre-CTS useful skew optimization inside place_opt_design. With default optimization settings, sequential elements are only advanced. With Early Clock Flow enabled, elements may be advanced or delayed | setOptMode -opt_skew_pre_cts true |
| 247 | setAnalysisMode -cppr | Enables Common Path Pessimism Removal (CPPR) for timing analysis | setAnalysisMode -analysisType onChipVariation -cppr both |
| 248 | setOptMode -dynamicPowerEffort | Legacy parameter for dynamic power optimization effort (deprecated; use opt_leakage_to_dynamic_ratio instead) | setOptMode -leakagePowerEffort partial -dynamicPowerEffort maximum |
| 249 | setDelayCalMode -SIAware | Enables or disables SI-aware delay calculation. When false, only base timing is used without crosstalk incremental delay during postRoute optimization | setDelayCalMode -SIAware true |
| 250 | setOptMode -leakagePowerEffort | Legacy parameter for leakage power optimization effort (deprecated; use opt_power_effort instead) | setOptMode -leakagePowerEffort minimal -dynamicPowerEffort partial |
| 251 | setDesignMode -flowEffort | Sets the overall flow effort for GigaOpt optimization. 'standard' is the default for full GigaOpt setup TNS optimization | setDesignMode -flowEffort balanced |
| 252 | setOptMode -opt_leakage_to_dynamic_ratio | Controls the balance between leakage and dynamic power optimization; 1.0 = leakage only, 0.0 = dynamic only | setOptMode -opt_power_effort maximum -opt_leakage_to_dynamic_ratio 0\.6 |
| 253 | setOptMode -opt_power_effort | Sets the power optimization effort level during postRoute GigaOpt optimization | setOptMode -opt_power_effort maximum -opt_leakage_to_dynamic_ratio 0.8 |
| 254 | setOptMode -opt_power_effort | Sets overall power optimization effort level in power-driven optimization; replaces legacy leakagePowerEffort parameter | setOptMode -opt_power_effort minimal -opt_leakage_to_dynamic_ratio 0.8 |
| 255 | setOptMode -opt_leakage_to_dynamic_ratio | Sets the ratio of leakage to dynamic power optimization during GigaOpt. Value of 1.0 fully prioritizes leakage; 0.0 fully prioritizes dynamic power | setOptMode -opt_power_effort maximum -opt_leakage_to_dynamic_ratio 0.8 |
| 256 | setOptMode -opt_power_effort | Sets the power optimization effort level during optDesign; determines whether power optimization is highest priority | setOptMode -opt_power_effort maximum |
| 257 | setOptMode -opt_post_route_fix _si_transitions | Enables fixing of SI transition violations during post-route timing optimization | setOptMode -opt_post_route_fix_si_transitions true |
| 258 | setOptMode -opt_leakage_to_dynamic_ratio | Controls the priority ratio between leakage and dynamic power optimization during timing optimization; 0.0=full dynamic priority, 1.0=full leakage priority | setOptMode -opt_leakage_to_dynamic_ratio 0\.6 |
| 259 | setOptMode -opt_fix_fanout_load | Enables repair of fanout violations during optDesign. Must be set starting from the first call of optDesign -preCTS through the last optDesign -postRoute | setOptMode -opt_fix_fanout_load true |
| 260 | setOptMode -opt_leakage_to_dynamic_ratio | When set to 0.0, directs power optimization effort entirely toward dynamic power rather than leakage power | setOptMode -opt_power_effort maximum -opt_leakage_to_dynamic_ratio 0.0 |
| 261 | setOptMode -opt_hold_allow_set up_tns_degradation | Controls whether hold repair is allowed to degrade the setup total negative slack (TNS). When false, prevents hold repair from degrading setup TNS | setOptMode -opt_hold_allow_setup_tns_degradation true |
| 262 | setOptMode -opt_power_effort | Controls dynamic power optimization effort during timing optimization. 'none' skips dynamic power optimization; 'low' optimizes only in pre-CTS setup phase; 'high' optimizes across all setup optimization phases | setOptMode -opt_power_effort maximum -opt_leakage_to_dynamic_ratio 0.0 |
| 263 | setOptMode -opt_setup_target_slack | Overrides the setup target slack value used as the floor for hold repair degradation | setOptMode -opt_setup_target_slack 0.05 |
| 264 | setOptMode -opt_leakage_to_dynamic_ratio | Controls the ratio of leakage power optimization to dynamic power optimization. A value of 1.0 focuses on leakage only; 0.0 focuses on dynamic power only | setOptMode -opt_power_effort minimal -opt_leakage_to_dynamic_ratio 0.8 |
| 265 | setAnalysisMode -cppr | Sets up Clock Reconvergence Pessimism Removal (CPPR) to account for pessimism in common clock paths during timing optimization | setAnalysisMode -cppr both |
| 266 | setOptMode -opt_power_effort | Controls the level of power optimization during timing optimization. 'none' disables power optimization; 'low' optimizes leakage after each timing step with full leakage awareness; 'high' uses more complex preRoute flow for greater leakage savings | setOptMode -opt_power_effort minimal |
| 267 | setAnalysisMode -clockPropagation | Controls clock propagation mode for timing analysis. optDesign sets this to autoDetectClockTree by default — value cannot be overridden during optDesign | |
| 268 | setDelayCalMode -SIAware | Enables SI-aware delay calculation mode. Must be set to true before enabling SI slew violation fixing with setOptMode -opt_post_route_fix_si_transitions | setDelayCalMode -SIAware true |
| 269 | setExtractRCMode -engine | Sets the RC extraction engine to use. optDesign sets this to postRoute by default | |
| 270 | setSIMode -report_si_slew_max_transition | Enables reporting of SI-induced maximum transition violations during timing analysis (timeDesign -postRoute or reportTranViolation). When set to true alone (without setOptMode -opt_post_route_fix_si_transitions), only SI slew reporting is turned on without fixing | setSIMode -report_si_slew_max_transition true |
| 271 | setExtractRCMode -effortLevel | Sets the effort level for RC extraction. optDesign defaults to medium (TQuantus). Can be changed to high (IQuantus) or signoff (Standalone Quantus), both requiring a Quantus license | |
| 272 | setOptMode -opt_post_route_fix_glitch | Controls whether SI glitch violations are fixed during post-route optimization. By default, post-route optimization fixes SI glitch violations | setOptMode -opt_post_route_fix_glitch true |
| 273 | setOptMode -opt_target_based_opt_file | Sets the target-based optimization (TBOpt) file containing instances, nets, and paths for the software to optimize directly in post-Route targeted optimization | setOptMode -opt_target_based_opt_file tb_opt.txt |
| 274 | setOptMode -opt_post_route_fix _si_transitions | Enables fixing of SI (signal integrity) slew violations during post-route optimization. When set to true, optDesign fixes SI-induced maximum transition violations | setOptMode -opt_post_route_fix_si_transitions true |
| 275 | setOptMode -opt_target_based_opt_hold_file | Sets the target-based optimization file for hold optimization, containing critical instances identified by bottleneck analysis with -early flag | setOptMode -opt_target_based_opt_hold_file TBOpt_bottleneck_5_hold.txt |
| 276 | setOptMode -opt_target_based_opt_file | Sets the target file for target-based optimization (TBOpt). The file lists bottleneck instances to focus optimization effort. Can be generated from Timing Debug Bottleneck Analysis | setOptMode -opt_target_based_opt_file tb_opt.txt |
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