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INNOVUS APP OPTIONS

Advanced On-Chip Variation Tuning

S.NoApp OptionDescriptionExample
1setAnalysisMode -aocvEnables Advanced On-Chip Variation (AOCV) analysis mode. When enabled, supports modeling of AOCV derated delays and stage weights in Extracted Timing Models (ETM)setAnalysisMode -aocv true
2setMultiCpuUsage -cpuPerRemoteHostSets the number of CPUs per remote host for distributed processingsetMultiCpuUsage -remoteHost 2 -cpuPerRemoteHost 1
3timing_extract_model_aocv_mod eGlobal Tcl variable specifying the AOCV derating mode for timing model extraction (ETM). 'graph_based' derates ETM delays using graph-based stage counts. 'path_based' derates using total path stage count of worst path. 'none' models derated delays with user-derate effect only (no AOCV)set timing_extract_model_aocv_mode graph_based
4setMultiCpuUsage -remoteHostSets the number of remote host computers to use for distributed processing during prototype model creationsetMultiCpuUsage -remoteHost 2 -cpuPerRemoteHost 1
5setAnalysisMode -aocvEnables AOCV (Advanced On-Chip Variation) analysis mode. Must be enabled before using graph_based or path_based AOCV derating modes in timing model extractionsetAnalysisMode -aocv true
6set_proto_mode -identify_max_instsSets the maximum number of instances a module can have to be considered for automated prototype model identificationset_proto_mode -identify_max_insts 4190
7setDesignMode -bottomRoutingLayerEstablishes the bottom (lowest) routing layer for Early Global Route and other routing commandssetDesignMode -bottomRoutingLayer value
8set_proto_mode -identify_min_instsSets the minimum number of instances a module must have to be considered for automated prototype model identificationset_proto_mode -identify_min_insts 205
9setDesignMode -topRoutingLayerEstablishes the top (highest) routing layer for Early Global Route and other routing commandssetDesignMode -topRoutingLayer value
10setRouteMode -earlyGlobalHono rMsvRouteConstraintEnables Early Global Route to honor multi-supply voltage (MSV) route constraints during early global routingsetRouteMode -earlyGlobalHonorMsvRouteConstraint true
11setRouteMode -earlyGlobalHono rClockSpecNDRForces Early Global Route to honor the routing constraints (NDR) defined in the FE-CTS spec file for clock wiressetRouteMode -earlyGlobalHonorClockSpecNDR true
12setRouteMode -earlyGlobalHono rMsvRouteConstraintControls whether Early Global Route honors multiple supply voltage (MSV) domain routing constraints. When enabled, wires are routed inside preferred power domains as much as possible. When disabled (default), Early Global Route routes as a flat design ignoring power domain settingssetRouteMode -earlyGlobalHonorMsvRouteConstraint true
13setRouteMode -earlyGlobalNum TracksPerClockWireEstablishes the number of routing tracks reserved per clock wire by Early Global RoutesetRouteMode -earlyGlobalNumTracksPerClockWire value
14setRouteMode -earlyGlobalRout ePartitionPinGuideEnables or disables honoring of pin guides during early global route for partitioned designssetRouteMode -earlyGlobalRoutePartitionHonorFence . -earlyGlobalRoutePartitionPinGuide true
15setRouteMode -earlyGlobalRouteSecondPGEnables routing of secondary PG pins in Early Global Route, making congestion results more accurate by including secondary power/ground pin routingsetRouteMode -earlyGlobalRouteSecondPG true
16setRouteMode -earlyGlobalRout ePartitionHonorFenceSpecifies a list of partition cell names for which the early global route will honor fence constraints during partitioned routingsetRouteMode -earlyGlobalRoutePartitionHonorFence .
17setRouteMode -earlyGlobalSeco ndPGMaxFanoutEstablishes the maximum fanout for Early Global Route when routing secondary PG pinssetRouteMode -earlyGlobalSecondPGMaxFanout
18setRouteMode -earlyGlobalRout ePartitionHonorPinSpecifies partition cells whose placed and fixed pins should be honored during early global routesetRouteMode -earlyGlobalRoutePartitionHonorFence list_of_ptn_cell_names -earlyGlobalRoutePartitionHonorPin list_of_ptn_cell_names
19setRouteMode -earlyGlobalRout eStripeLayerRangeEstablishes the connected stripe layer range for secondary PG pin routing in Early Global Route, controlling which power stripe layer to connectsetRouteMode -earlyGlobalRouteStripeLayerRange
20setRouteMode -earlyGlobalRout ePartitionHonorFenceSpecifies partition cells whose partition fences with single entry should be honored during early global routesetRouteMode -earlyGlobalRoutePartitionHonorFence list_of_ptn_cell_names -earlyGlobalRoutePartitionHonorPin list_of_ptn_cell_names
21setRouteMode -earlyGlobalReverseDirectionSpecifies a region in which Early Global Route routes wires in the non-preferred (reverse) direction on a given layer range, affecting congestion value calculation by reducing routing capacity on specified layer and adding resources on adjacent layerssetRouteMode -earlyGlobalReverseDirection "(757.996 542.697 995.323 772.5685) Metal3:Metal3"
22setRouteMode -earlyGlobalRout ePartitionPinGuideEnables pin guide honoring during early global route for partitioned designssetRouteMode -earlyGlobalRoutePartitionPinGuide true
23setRouteMode -earlyGlobalRout ePartitionHonorFenceEstablishes the partition cells in which Early Global Route honors fence constraints. Specified cells names are Verilog module namessetRouteMode -earlyGlobalRoutePartitionHonorFence list_of_ptn_cell_names
24setRouteMode -earlyGlobalRout ePartitionPinGuideEnables pin guide usage during early global route for partitions
25setRouteMode -earlyGlobalRout ePartitionHonorPinEstablishes the partition cells in which Early Global Route honors partition fences with single-entry constraints and pre-assigned pins (FIXED) and assigned pins (PLACED)setRouteMode -earlyGlobalRoutePartitionHonorPin list_of_ptn_cell_names
26setRouteMode -earlyGlobalRout ePartitionHonorPinSpecifies partitions to be routed using pin-honoring style during early global route. Takes priority over HonorFence settingsetRouteMode -earlyGlobalRoutePartitionHonorPin {P1}
27setRouteMode -earlyGlobalRout ePartitionPinGuideDefines whether Early Global Route should honor fixed pin positions and user-specified pin guides from the floorplan file when routing through partition pin pointssetRouteMode -earlyGlobalRoutePartitionPinGuide true
28setRouteMode -earlyGlobalRout ePartitionHonorFenceSpecifies partitions to be routed using fence-honoring style during early global route. Only specified partitions honor fence constraints; others are routed flatsetRouteMode -earlyGlobalRoutePartitionHonorFence {P2 C2}

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