Innovus App Options ← Home
Educational Reference Only. This content is an independent study reference. App option names, descriptions and examples are provided for learning purposes. Always verify against official Cadence / Synopsys documentation. This site is not affiliated with or endorsed by Cadence Design Systems or Synopsys Inc.
12
INNOVUS APP OPTIONS

Selective Routing and Analysis Setup

S.NoApp OptionDescriptionExample
1setNanoRouteMode -route_selected_net_onlySpecifies whether NanoRoute routes all nets at once or routes only selected nets. Used to insert via pillars on a specific net groupsetNanoRouteMode -route_selected_net_only true
2setAnalysisMode -aocvEnables Advanced On-Chip Variation analysis mode; prerequisite for using AOCV-based ETM deratingsetAnalysisMode -aocv true
3setOptMode -opt_via_pillar_effortControls the effort level for via pillar insertion and upgradation during preroute and postroute timing optimization. none=no via pillar ops (but stackViaRequired honored); low=only when WNS path stuck; medium=during TNS optimization; high=aggressivesetOptMode -opt_via_pillar_effort medium
4set timing_extract_model_aocv_ modeSets the AOCV (Advanced On-Chip Variation) derating mode for extracted timing model (ETM) delays: graph_based uses graph stage counts, path_based uses total path stage count, none uses user derates without AOCVset timing_extract_model_aocv_mode graph_based
5setPlaceMode -place_global_place_io_pinsControls whether I/O pin assignment is performed during placement. When set to true, the placer internally calls assignIoPins to place I/O pins based on current cell placement. When false, disables I/O pin assignment during placementsetPlaceMode -place_global_place_io_pins true
6setAnalysisMode -aocvEnables Advanced On-Chip Variation (AOCV) analysis mode for Extracted Timing Model (ETM) modeling of derated delays and stage weightssetAnalysisMode -aocv true
7setRouteMode -earlyGlobalRout ePartitionHonorFenceIdentifies nested partitions and honors boundaries of both child and parent partitions during Early Global Route. Used to route designs with hierarchical partitions while respecting fence constraintssetRouteMode -earlyGlobalRoutePartitionHonorFence {.}
8setRouteMode -earlyGlobalRout ePartitionHonorPinEnables Early Global Route to honor partition fences with single-entry constraints and pre-assigned or assigned partition pins (FIXED or PLACED status)setRouteMode -earlyGlobalRoutePartitionHonorPin true
9setRouteMode -earlyGlobalRout ePartitionHonorFenceSpecifies partition cell names for which Early Global Route honors partition fence constraints during route-based pin assignmentsetRouteMode -earlyGlobalRoutePartitionHonorFence list_of_ptn_cell_names
10setScanReorderMode -keepPortSpecifies a file listing hierarchical instances whose ports should be kept during scan reorder optimizationsetScanReorderMode -keepPort keepPort.hinsts
11setPlaceMode -place_global_place_io_pinsEnables I/O pin assignment to be performed automatically during the placement step (place_design command)setPlaceMode -place_global_place_io_pins true
12setScanReorderMode -enable_for_partitionEnables scan reorder mode for partitioned designs, allowing scan reordering to be applied across hierarchical partitionssetScanReorderMode -enable_for_partition true
13setRouteMode -earlyGlobalRout ePartitionHonorFenceSpecifies a list of partition cell names for which the early global route will honor fence constraints during congestion-aware pin assignment for channel-based designssetRouteMode -earlyGlobalRoutePartitionHonorFence list_of_ptn_cell_names
14setMultiCpuUsage -localCpuSets the maximum number of local CPU threads to use for multi-threaded processing during block-level ECO updates in the iHDB flowsetMultiCpuUsage -localCpu 8
15setRouteMode -earlyGlobalRout ePartitionHonorFenceInstructs Early Global Route to honor partition fence boundaries during routing. Takes a list of partition cell names whose fence boundaries should be respectedsetRouteMode -earlyGlobalRoutePartitionHonorFence list_of_ptn_cell_names
16setOptMode -opt_skewEnables or disables useful skew optimization. Setting to false disables useful skew during top-level timing closure in iHDB flowsetOptMode -opt_skew true
17setRouteMode -earlyGlobalRout ePartitionHonorPinInstructs Early Global Route to honor partition pin constraints during routing. Takes a list of partition cell names whose pin constraints should be respectedsetRouteMode -earlyGlobalRoutePartitionHonorPin list_of_ptn_cell_names
18setAnalysisMode -cpprSets the common path pessimism removal (CPPR) setting for timing analysissetAnalysisMode -analysisType onChipVariation -cppr both
19setPlaceMode -place_design_floorplan_modeEnables floorplan mode for placement, recommended when inserting feedthroughs during prototypingsetPlaceMode -place_design_floorplan_mode true
20setAnalysisMode -analysisTypeSets the timing analysis type. onChipVariation accounts for OCV derating during analysissetAnalysisMode -analysisType onChipVariation -cppr both
21setExtractRCMode -engineSets the RC extraction engine; preRoute is used for feedthrough insertion during prototyping stagesetExtractRCMode -engine preRoute
22setDesignMode -processSets the process technology node for the design, used in timing analysis and optimizationsetDesignMode -process 65
23setMultiCpuUsage -localCpuSets the maximum number of local CPUs to use for distributed timing budgeting. In local mode, distributes MMMC views across multiple CPUs on the same machinesetMultiCpuUsage -localCpu integer
24setAnalysisMode -analysisTypeSets the timing analysis type. 'onChipVariation' used here for post-route optimization of partition blocks before ILM creationsetAnalysisMode -analysisType onChipVariation
25setMultiCpuUsage -remoteHostSets the maximum number of remote host CPUs to use for distributed timing budgeting. In remote mode, distributes MMMC views to multiple machinessetMultiCpuUsage -remoteHost 4
26setAnalysisMode -clockPropagationControls clock propagation mode during timing analysis and budgeting; sdcControl mode along with set_clock_propagation constraint does not cause network delay through the clock tree to be budgeted for partitionssetAnalysisMode -clockPropagation sdcControl
27setDistributeHost -localSets up distributed processing to use multiple CPUs on the local machine for timing budgetingsetDistributeHost -local
28setAnalysisMode -skewControls whether clock skew is included in the generated set_clock_latency constraints during timing budgeting for partitionssetAnalysisMode -skew true
29setDistributeHost -rshSets up distributed processing to use remote shell (rsh) for connecting to remote hosts for distributed timing budgetingsetDistributeHost -rsh -add {host1 host2 host3}
30setBudgetingMode -virtualOptEngineSets the virtual optimization engine to use during timing budgeting. Setting to 'none' disables the virtual optimization enginesetBudgetingMode -virtualOptEngine partial

Comments

Leave a Reply

Your email address will not be published. Required fields are marked *

Replying to