Interconnect & Repeaters — Deep Dive

Ground-up guide to CMOS circuit design — transistors, gates, delay, power, memory, datapath and test

Why Long Wires Need Help

A short wire is nearly free. A long wire is not. It has resistance along its length. It has capacitance to ground and to neighbours. Together these make delay. And that delay grows fast with length. This chapter shows why, and how repeaters (buffers inserted along a wire) fix it. It uses plain words and simple numbers.

The Square-Law Problem

Picture a wire of length L. Its resistance grows with L. Its capacitance also grows with L. The delay roughly depends on resistance times capacitance. So delay depends on L times L. That is L squared. Double the wire length, and delay goes up about four times. Triple it, and delay goes up about nine times. This is the killer. A wire twice as long is not twice as slow. It is four times as slow.

Worked example — the square law

A 1 mm wire has a delay of 0.20 ns. How slow is a 3 mm wire with no help?

delay grows with length squared
3 mm is 3× longer → 3² = 9× the delay
delay ≈ 9 × 0.20 = 1.8 ns

That is huge. A single wire now costs nearly two nanoseconds. This is why long wires must be broken up.

Repeaters: Turning Squares into Lines

The fix is simple. Cut the long wire into pieces. Put a buffer between each piece. Each buffer re-drives the signal fresh. So each short piece only has a small square-law delay. The pieces add up linearly, not as a square. With repeaters, total delay grows about linearly with length. So a wire twice as long is about twice as slow, not four times. That is a massive win for long wires.

Worked example — repeaters help

Take that 3 mm wire. Split it into 3 segments of 1 mm. Each segment has 0.20 ns of wire delay. Add a small buffer delay, say 0.05 ns each.

without repeaters: ~1.8 ns (square law)
with 3 segments:  3 × (0.20 + 0.05) = 3 × 0.25 = 0.75 ns

The wire dropped from 1.8 ns to 0.75 ns. That is more than 2× faster, just by adding buffers.

How Many Repeaters? And How Big?

There is a best number of repeaters. And a best size for each.

• Too few repeaters: each segment is long, so square-law delay creeps back.
• Too many repeaters: you pay too much buffer delay and power.
• Too small buffers: weak drive, slow segments.
• Too big buffers: wasted power and area, and they load each other. The sweet spot balances wire delay against buffer delay. In practice, tools compute the ideal repeater spacing and size from the wire's R and C per unit length and the buffer's strength. The result is a regular chain: equal segments, equal buffer sizes.

Worked example — picking spacing

Suppose the math says the best segment length is about 0.8 mm for this wire type. A 4 mm wire then wants about 4 / 0.8 = 5 segments. So you insert 4 repeaters (one between each pair of segments). Each is sized to the computed best drive. The chain is regular and near-optimal.

Wires Do Not Scale Like Gates

Here is a key modern fact. When transistors shrink, they get faster. But wires do not get faster the same way. A thinner wire has more resistance. So as nodes shrink, wire delay becomes a bigger share of the total. This is why interconnect now matters as much as logic. Long global wires can dominate a path. Designers fight back with repeaters, with wider wires, and by routing long wires on thick upper metal layers.

Other Wire Tricks

Repeaters are the main tool. But there are others.

• Wider wires: lower resistance, less delay, for important nets.
• Upper metal layers: thicker, lower-resistance metal for long global wires.
• Shielding: ground wires beside a sensitive net cut crosstalk.
• Spacing: more gap to neighbours lowers coupling capacitance.

Each costs routing resources. So you spend them on the nets that matter: clocks, long buses, and critical paths.

Worked example — wide wire vs repeaters

A medium net is a bit too slow. Option A: add two repeaters. Option B: double the wire width on a thicker layer. Doubling width roughly halves resistance, cutting wire delay by about half. If that is enough, the wide wire avoids two extra buffers and their power. The right choice depends on routing room and the power budget.

Interview Q&A

and its capacitance grow with length. Delay depends on their product, so it depends on length times length, i.e. length squared. Doubling length quadruples delay.

buffer. Each short segment has only a small square-law delay, and the segments add up linearly. So total delay grows roughly linearly with length instead of as a square.

delay and power. There is an optimal spacing and buffer size that balances wire delay against buffer delay, giving minimum total delay for the least power.

get thinner and thus more resistive, so a same-length wire gets slower. Interconnect therefore becomes a larger share of path delay, sometimes dominating it.

upper metal layer (lower resistance), shield it (less crosstalk), or space it from neighbours (less coupling capacitance). These cost routing resources, so they are reserved for clocks, long buses, and critical nets.

you want to avoid the power and area of extra buffers. Doubling width roughly halves resistance and cuts wire delay; if that is enough to meet timing, it is simpler than a repeater chain. Otherwise repeaters give more delay reduction on very long wires.

Key Takeaways

• Unbuffered wire delay grows with length squared — long wires are disproportionately slow.
• Repeaters cut a wire into segments, making delay grow linearly instead; there is an optimal spacing and buffer size.
• At smaller nodes, wires get slower while transistors get faster, so interconnect dominates more paths.

• Other levers: wider wires, thick upper layers, shielding, spacing — spent on clocks, buses, and critical nets.
• Always balance: too few/small or too many/big repeaters both hurt; the goal is minimum total delay at acceptable power.