I/O Circuits & ESD Protection

Ground-up guide to CMOS circuit design — transistors, gates, delay, power, memory, datapath and test

Where the Chip Meets the World

The inside of a chip runs at a low, careful voltage. The outside world is noisy and rough. Signals come in from long board wires. Static shocks can hit a pin. The job of the I/O (input/output) circuits is to bridge these two worlds safely. They sit in a ring around the edge of the chip, called the pad ring. This chapter explains that ring in plain words. It covers output drivers, input buffers, level shifters, and ESD (electrostatic discharge — a sudden static shock) protection. These circuits are unglamorous. But a chip that cannot talk to the board, or that dies from a static zap, is worthless.

The Pad Ring

Every signal that leaves or enters the chip passes through a pad. A pad is a metal landing area connected to a package pin or bump. Around each pad sits a cell with three jobs: drive the signal out, receive the signal in, and protect against shocks. Pads come in a few kinds. Signal pads carry data. Power pads bring in supply and ground. Some pads are analog and need to be quiet. The ring also holds the ESD network, which links all pads to a shared safety path.

A key fact: you need many power and ground pads, not one. Each pad can only carry so much current. A big chip may have hundreds of power pads just to feed itself without too much voltage drop.

Output Drivers

An output driver pushes a signal off the chip. It must charge a large load: the pin, the package, and the board wire. That load is far bigger than anything inside the chip. So the driver transistors are large. But a fast, strong driver causes its own trouble. When it switches quickly, it pulls a sharp spike of current. That spike makes supply noise. It also makes the output edge ring (overshoot and wobble). So drivers use slew control (limiting how fast the edge rises or falls). A common trick is to switch the driver in slices. Several smaller drivers turn on one after another, a few tenths of a nanosecond apart. The edge still moves, but more gently. This cuts noise and ringing.

Worked example — driver current spike

A driver charges a 12 pF off-chip load from 0 to 1.1 V in 0.6 ns.

average current I = C × dV / dt
I = 12e-12 × 1.1 / 0.6e-9
I = 13.2e-12 / 0.6e-9 ≈ 22 mA

One pin pulling 22 mA in a flash is a lot. Switch 16 of them at once and the chip yanks over 300 mA in under a nanosecond. This is why output banks need many ground pads and slew control.

Input Buffers and Schmitt Triggers

An input buffer receives a signal coming in. The incoming edge may be slow and noisy after travelling across a board. A plain inverter would react badly to a slow, wobbly edge. It might switch back and forth on the noise. A Schmitt trigger fixes this. It is an input gate with two different switching levels: a higher one for a rising input and a lower one for a falling input. This gap is called hysteresis. A noisy signal near the middle does not cause repeated flips, because it must travel the whole gap to switch again.

Worked example — hysteresis margin

A Schmitt trigger switches high at 0.7 V and switches low at 0.4 V.

hysteresis = 0.7 - 0.4 = 0.3 V

Noise smaller than 0.3 V around a held level cannot flip the output. That 0.3 V band is the buffer's immunity to noise on a slow input edge.

Level Shifters

The core of a modern chip often runs at a lower voltage than its I/O. The core might use 0.8 V to save power. The pins might need 1.8 V or more to talk to older board parts. A signal cannot cross between these without help. A level shifter moves a signal from one voltage to another. Going up (low core to high I/O) needs a special cross-coupled circuit, because a 0.8 V "high" cannot fully turn off a transistor powered at 1.8 V. Going down is easier but still needs care.

Level shifters also matter inside the chip, between voltage domains. The same circuit idea is reused there.

ESD Protection

ESD is a sudden static shock. A person, a machine, or a charged package can dump a few thousand volts into a pin in a few nanoseconds. The thin gate oxide inside a transistor breaks at only a few volts. So without protection, one touch destroys the chip. ESD protection gives the shock a safe path to ground, away from the delicate gates. It uses diodes and clamp circuits at every pad. When the voltage on a pin shoots up, a diode or clamp turns on and shunts the current to the supply rails. A big clamp transistor between power and ground then carries the surge.

The protection must be fast and big. It must turn on within a nanosecond and carry an amp or more for a short time. But it must also be invisible during normal use: it should not load the signal or leak.

Worked example — why gates need this

A bare gate oxide breaks near 5 V. A static event can reach 2000 V at the pin.

without protection: 2000 V across a 5 V oxide → instant destruction
with protection: clamp turns on near ~4 V, holds the pin low,
shunts the surge to the rail

The clamp keeps the internal voltage far below the breakdown level, so the gates survive.

Why I/O Voltage Differs From Core

It is worth stating plainly. The core wants low voltage for low power and because its tiny transistors cannot take much. The I/O wants higher voltage to drive long board wires and to match other chips. These goals fight. So chips run two or more supplies, and level shifters bridge them. This split is why a data sheet lists a core voltage and a separate I/O voltage. The pad ring lives at the I/O voltage. The logic inside lives at the core voltage.

Interview Q&A

protect the pin against ESD shocks. The cells sit in a ring around the die edge, each tied to a pad that connects to a package pin or bump.

off-chip load (pin, package, board wire), which is far larger than any on-chip load, so the transistors are wide. The downside is a sharp current spike when they switch, causing supply noise and edge ringing — which is why slew control and staged switching are used.

(hysteresis): higher for a rising input, lower for a falling one. The gap stops a slow or noisy input from flipping the output repeatedly, so it is used on slow or noisy incoming signals.

transistor powered at a higher voltage, so a plain buffer would leak or fail to switch. Up-shifting needs a cross-coupled circuit that latches the correct high level; down-shifting is easier because the drive is strong.

rails through diodes and a rail clamp, keeping the voltage at sensitive gates far below their breakdown level. It must turn on within a nanosecond and carry a large brief current, yet stay invisible during normal operation.

power and because tiny devices cannot tolerate much; the I/O needs a higher voltage to drive long board wires and match other chips. The two supplies coexist, and level shifters bridge signals between them.

Key Takeaways

• I/O circuits live in a pad ring and bridge the quiet low-voltage core to the rough, noisy outside world.
• Output drivers are large and need slew control and many ground pads to tame switching-current spikes.
• Schmitt-trigger inputs add hysteresis so slow, noisy edges do not cause repeated flips.
• Level shifters move signals between voltage domains; up-shifting is the hard direction.
• ESD protection shunts static shocks to the rails, keeping fragile gate oxides below breakdown — without it, one zap kills the chip.