Power Gating - Integrity and Granularity Power gating is effective for reducing leakage power in standby or sleep mode. Power gating overheads:

• Silicon area taken up by the sleep transistors.
• Routing resources needed for the permanent and virtual power networks.
• Complex power-gating design and implementation processes. Power integrity issues:
• IR drop across the sleep transistors.
• Ground bounce caused by the inrush wake-up current.
• Wake-up latency. Compared with fine-grain power gating, coarse-grain power gating:
• Is less sensitive to PVT variation.
• Introduces less IR-drop variation.
• Imposes a smaller area overhead. KEY Power gating cuts standby leakage but adds area, routing and integrity costs; coarse-grain gating is less PVT-sensitive with smaller overhead.

RMS Power vs Peak Power in Dynamic Analysis Power is meaningfully expressed as RMS power because RMS is the value that produces the same heating effect as a steady DC power, and the relevant current is the RMS current - I = sqrt(Power/Resistance). Peak power is instantaneous and is not the quantity that governs thermal behaviour, so RMS power is what is targeted. KEY RMS power reflects the actual heating effect, so it is the meaningful quantity to fix rather than instantaneous peak power.