KEY Placement checks cover legality, timing, module grouping and congestion driven by cell and pin density.

Output of the Placement Stage

• Timing.
• Congestion.
• Design density.
• Area.
• Power. KEY Placement outputs cover timing, congestion, density, area and power.

Commands to Review Placement

• A visual inspection of the database in the GUI.
• check_legality -verbose > chk_lega.rpt to confirm placement legality.
• report_qor > report_qor.rpt for the quality-of-results summary.
• report_timing -from [all_registers -clock_pin] -to [all_registers -data_pin] -net -trans -cap -nosplit -nworst 1 -max_path 1 for register-to-register timing. KEY Use a visual check plus check_legality, report_qor and a reg-to-reg report_timing.

Banking and De-Banking in Synthesis

• Banking combines several registers into a single standard cell.
• De-banking splits the registers back out of the bank.
• These banked cells are also called flop trays. Combining registers lets them share clock-tree resources, which reduces clock-network power. KEY Banking merges flops into trays to share clock resources and save power, de-banking reverses it.