supply. KEY Fight dynamic IR drop with a denser grid, cell padding, downsizing, decaps, load splitting and MIM caps.

Power Gating Power gating switches off a block when it is idle, saving significant power. There are two types: a header switch built from PMOS that disconnects VDD from the block, and a footer switch built from NMOS that disconnects VSS from the block. KEY Power gating shuts off idle blocks using a PMOS header (cuts VDD) or NMOS footer (cuts VSS).

IR-Drop Analysis Across All Modes We pick the use-case scenario of the chip that draws the most power, take that VCD, and close on it. There can also be multiple VCDs analyzed in parallel. KEY Run IR-drop on the highest-power use-case VCD, optionally multiple VCDs in parallel - not every mode.

Number of Corners for IR-Drop Analysis Dynamic power depends on the load capacitance, so we choose the corner with the highest impedance - either the rcworst or the cworst corner. KEY Use the highest-impedance corner - rcworst or cworst - for IR-drop analysis.

Toggle Rate for IR-Drop Analysis The toggle rate is purely design-dependent; the use-case scenario captured in the VCD provides the correct value. KEY Toggle rate is design-dependent and comes from the use-case VCD.