Fixing IR Drop with Congestion
- Spread the macros.
- Spread the standard cells.
- Increase strap width.
- Add more straps.
- Apply proper blockages. KEY Spread macros and cells, widen and add straps, and use proper blockages.
Beyond Width and Straps for IR Drop No - other measures also help:
- Spread the macros.
- Spread the standard cells.
- Apply proper blockages. KEY No - spreading macros and cells and using proper blockages also reduces IR drop.
Tie-High and Tie-Low Cells Tie-high and tie-low cells connect a transistor gate to power or to ground. In deep sub-micron processes, tying a gate directly to the rail risks the transistor turning on or off because of power or ground bounce, so foundries recommend tie cells instead. They are part of the standard-cell library: a cell needing VDD connects to a tie-high cell (a power-supply cell), while a cell needing VSS connects to a tie-low cell. KEY Tie cells safely connect transistor gates to power or ground, avoiding bounce-induced switching in deep sub-micron.
Avoiding IR Drop in Power Analysis
- Increase the width of the power metal layers.
- Move the power routing to a higher metal layer.
- Spread out the macros or standard cells.
- Add more power straps.
