KEY Match ITF/grdgenxo versions, temperature, pin caps, virtual-shield and metal-fill settings between ICC and StarRC.

CEL and FRAM Views

The CEL view is the complete physical view of the design with all layers, similar to GDS, while the FRAM view is just a skeleton abstraction, similar to LEF.

• CEL view: the full layout view of a physical structure - a via, standard cell, macro, or whole chip - containing placement, routing, pin and netlist information.
• The CEL view holds all the cell information needed for placement, routing and mask generation: placement data such as tracks, site rows and placement blockages; routing data such as netlist, pins, route guides and interconnect modeling; and all mask-layer geometries for final mask generation.
• FRAM view: an abstract representation of a cell used for placement and routing, containing only the metal blockages, allowed via areas and pin locations.
• The FRAM view abstracts the cell down to just what placement and routing need - the metal blockage areas where routing is not allowed, the allowed via areas and the pin locations. Creating a FRAM view from a CEL view is often called blockage, pin and via (BPV) extraction.
• The FRAM view is used for placement and routing, whereas the CEL view is used only to generate the final mask data for chip manufacturing.

KEY CEL is the full layout (like GDS) for mask generation; FRAM is the abstract blockage/pin/via view for place-and-route.

ECO Extraction

• ECO extraction performs extraction only on the parts of a design that differ from a reference design.
• The StarRC ECO extraction flow greatly cuts runtime by extracting only the nets changed by the ECO fixes. It maintains two parasitic