KEY Magma does only metal-level DRC; Calibre is a sign-off tool that checks down to poly and diffusion.

Violations Resolved in LVS

• Open errors.
• Short errors.
• Device mismatches.
• Port mismatches.
• Instance mismatches.
• Net mismatches.
• Floating nets.

KEY LVS catches opens, shorts, floating nets and device/port/instance/net mismatches.

Antenna Rules in ASIC Backend

Fixing antenna problems is generally expensive, so routing should be completed with very few or zero DRC violations before antenna violations are addressed.

Antenna fixing can be done either before or after the Optimize Routing step. Running Optimize Routing after the antenna fix can produce a good layout, but in most cases running it first shortens the overall turnaround time when both steps are needed.

KEY Antenna fixes are costly, so finish routing cleanly first and order antenna fixing around Optimize Routing for best turnaround.

Antenna Effect and Antenna Ratio

The antenna effect can occur during chip manufacturing and ruin a die. During metallization, wires connected to polysilicon transistor gates may be left floating until the upper metal layers are deposited. A long floating interconnect acts as a temporary capacitor that collects charge during steps such as plasma etching. If that accumulated charge is suddenly discharged, the gate oxide of the logic gate can break down permanently. This is the antenna effect.

It occurs in deep submicron technology because the gate-oxide thickness