Registers
A group of flip-flops sharing a clock, storing a multi-bit word and moving it around.
Description
A set of n flip-flops on a common clock that holds an n-bit word. Computation works on whole words; a register stores and transfers them as a unit. Each flip-flop stores one bit; control lines add parallel load, clear, and enable.
- A load line selects between holding the value and loading new data.
- A 2-to-1 MUX in front of each flip-flop chooses old Q or new D.
- An enable lets the register skip clocks without losing data.
- Moving a word from one register to another on a clock edge.
- The basis of RTL: every datapath operation is a register transfer.
- What: A set of n flip-flops on a common clock that holds an n-bit word.
- Why: Computation works on whole words; a register stores and transfers them as a unit.
- How: Each flip-flop stores one bit; control lines add parallel load, clear, and enable.
- Where: CPU register files, pipeline stages, I/O buffers, data paths.
- When: Whenever a multi-bit value must persist or move between blocks each clock.
At a glance
What
A set of n flip-flops on a common clock that holds an n-bit word.
Why
Computation works on whole words; a register stores and transfers them as a unit.
How
Each flip-flop stores one bit; control lines add parallel load, clear, and enable.
Where
CPU register files, pipeline stages, I/O buffers, data paths.
When
Whenever a multi-bit value must persist or move between blocks each clock.
Think of it like…
A register is a row of lockers opened by one bell: at the bell everyone swaps contents together, and a 'load' switch decides whether to take new items or keep the old.
Register with parallel load
- A load line selects between holding the value and loading new data.
- A 2-to-1 MUX in front of each flip-flop chooses old Q or new D.
- An enable lets the register skip clocks without losing data.
Register transfer
- Moving a word from one register to another on a clock edge.
- The basis of RTL: every datapath operation is a register transfer.
Common control lines
| Line | Effect |
|---|---|
| Load | capture parallel data D |
| Clear | force all bits to 0 |
| Enable | ignore clock (hold) |
| Clock | update on the edge |
Black-box view
Inputs on the left → outputs on the right · particles show signal direction
Watch bits load and move
▶ live simulatorPick a mode, then press Clock ▲ to shift and trace each bit.
Real-world applications
The 5 Whys
- 1
Why registers? Data is processed a whole word at a time.
- 2
Why a shared clock? So all bits update together, never half-changed.
- 3
Why parallel load? To capture a new word in a single clock.
- 4
Why an enable? To hold a value across clocks without clearing it.
- 5
Root cause: grouped, clocked storage is the unit of data movement in any datapath.
Cheat sheet
Working principle
- Each flip-flop stores one bit; control lines add parallel load, clear, and enable.
- A set of n flip-flops on a common clock that holds an n-bit word.
Formulas & Boolean expressions
- Load = capture parallel data D
- Clear = force all bits to 0
- Enable = ignore clock (hold)
- Clock = update on the edge
Key facts
- A load line selects between holding the value and loading new data.
- Moving a word from one register to another on a clock edge.
Why it exists
- Root cause: grouped, clocked storage is the unit of data movement in any datapath.