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VLSI Physical Design  ›  Ch 5. Clock Tree Synthesis & Skew
  • Condition: there must be positive setup slack into the launch register.

Useful skew on the capture path:

  • Preferred, since STA is endpoint-based and there are fewer endpoints to manage.
  • It works by increasing the capture clock-path delay.
  • It is comparatively easier to add delay to the clock.
  • Condition: there must be positive setup slack out of the capture flop.

KEY Useful skew shifts clock arrival when the data path can't be optimised; capture-side is preferred and easier.

Early-Clock Flow in Lower Nodes

  • It gives an early estimate of routing congestion and skew.
  • It also reserves space for clock cells ahead of the CTS stage.

KEY Early-clock flow estimates congestion and skew early and reserves space for CTS cells.

Disadvantages of Clock Gating

  • It introduces an extra timing check.
  • It increases the design time needed for timing closure.

KEY Clock gating adds an extra timing check and lengthens closure time.

Pros and Cons of CTS Schemes

Mesh:

  • Uses more routing resources.
  • Robust against design variation.

H-tree:

  • Gives a balanced clock tree.
  • More branches, which means more area and more power.

KEY Mesh is variation-robust but routing-heavy; H-tree is balanced but costs more area and power.