Introduction (Sequential Logic)
What sequential logic is and what this chapter builds toward.
Description
Sequential logic has memory: outputs depend on inputs and on stored state. This chapter introduces latches and flip-flops, shows how to analyze clocked sequential circuits, reduce and assign states, and follow a design procedure for synchronous machines.
- Storage elements: latches (level) and flip-flops (edge).
- Analysis of clocked sequential circuits.
- State tables and state diagrams.
- State reduction and assignment.
- A synchronous design procedure.
- State = the stored memory of the machine.
- A clock synchronizes all state changes.
- Mealy outputs depend on state+input; Moore on state only.
- Feedback through storage creates the state.
- Synchronous design makes timing analyzable.
At a glance
What
Logic whose outputs depend on present inputs plus stored past (state).
Why
Counting, sequencing, and control all need memory of history.
How
Combinational logic plus clocked storage in a feedback loop.
Where
Controllers, counters, CPUs, protocols.
When
Whenever behavior must depend on the past.
Think of it like…
Sequential logic is a board game: your next move depends not just on the dice (inputs) but on where your piece already sits (state).
Chapter scope
- Storage elements: latches (level) and flip-flops (edge).
- Analysis of clocked sequential circuits.
- State tables and state diagrams.
- State reduction and assignment.
- A synchronous design procedure.
Key ideas
- State = the stored memory of the machine.
- A clock synchronizes all state changes.
- Mealy outputs depend on state+input; Moore on state only.
- Feedback through storage creates the state.
- Synchronous design makes timing analyzable.
Mealy vs Moore
| Mealy | Moore | |
|---|---|---|
| Output depends on | state + input | state only |
| Output timing | between edges | after edge |
Flip-flop — the memory element
▶ live simulatorSet inputs, then Run for a live clock (or Step one edge) and watch Q on the waveform.
| D | Q⁺ | note |
|---|---|---|
| 0 | 0 | reset |
| 1 | 1 | set |
Characteristic equation: Q⁺ = D
Real-world applications
The 5 Whys
- 1
Why sequential logic? Tasks need memory of the past.
- 2
Why a clock? Synchronize all state updates.
- 3
Why state tables? Enumerate behavior precisely.
- 4
Why reduce states? Fewer flip-flops, simpler logic.
- 5
Root cause: feedback through clocked storage turns logic into a state machine.
Cheat sheet
Working principle
- Combinational logic plus clocked storage in a feedback loop.
- Logic whose outputs depend on present inputs plus stored past (state).
Formulas & Boolean expressions
- State = the stored memory of the machine.
Key facts
- Storage elements: latches (level) and flip-flops (edge).
- State = the stored memory of the machine.
Why it exists
- Root cause: feedback through clocked storage turns logic into a state machine.