Why is timing bad at CTS? Because of routing estimation and timing estimation (clock skew, clock uncertainty):

• Placement-level clock uncertainty: jitter (fixed) + skew (fixed) + clock-path distortion (fixed).
• CTS-level clock uncertainty: jitter (fixed) + skew (depends on the path) + clock-path distortion (depends on the number of levels and the cells used).
• Congestion is also checked.

KEY CTS checks cover legal placement, grid/cell-family choices, timing (WNS/TNS/FEP), clock uncertainty and congestion.

Inputs to CTS

• A database that has passed all placement checks.
• CTS targets.
• CTS constraints.
• CTS cells.
• CTS NDR.
• CTS exceptions.

KEY CTS inputs: a placement-clean database, plus CTS targets, constraints, cells, NDR and exceptions.

Checks Done After CTS

• All cells are legally placed.
• The cells used match the input specification.
• Transition time on the clock path.
• Skew.
• Insertion delay.
• Timing.
• Congestion.

KEY Post-CTS checks: legal placement, correct cells, clock transition, skew, insertion delay, timing and congestion.