Binary Adder–Subtractor
Chain full adders to add multi-bit numbers; flip a control line to subtract.
Description
A combinational circuit that adds (or subtracts) two n-bit binary numbers. Addition is the core operation an ALU must perform; subtraction reuses the same hardware. Cascade n full adders; for subtract, XOR the B inputs with a mode line and set carry-in = 1.
- Adds three bits (A, B, carry-in) → Sum and Carry-out.
- Sum = A ⊕ B ⊕ Cin; Cout = AB + Cin(A ⊕ B).
- Carry-out of each stage feeds the carry-in of the next — it 'ripples'.
- Subtraction: invert B and set carry-in to 1 (adds the two's complement).
- Trade-off: simple but slow — carry must propagate through every stage.
- What: A combinational circuit that adds (or subtracts) two n-bit binary numbers.
- Why: Addition is the core operation an ALU must perform; subtraction reuses the same hardware.
- How: Cascade n full adders; for subtract, XOR the B inputs with a mode line and set carry-in = 1.
- Where: The arithmetic core of every CPU/GPU ALU and DSP datapath.
- When: Any integer add, subtract, compare, or address calculation.
At a glance
What
A combinational circuit that adds (or subtracts) two n-bit binary numbers.
Why
Addition is the core operation an ALU must perform; subtraction reuses the same hardware.
How
Cascade n full adders; for subtract, XOR the B inputs with a mode line and set carry-in = 1.
Where
The arithmetic core of every CPU/GPU ALU and DSP datapath.
When
Any integer add, subtract, compare, or address calculation.
Think of it like…
A ripple adder is a bucket brigade: each person can't pass water (carry) until the one before them does. The last bucket waits the longest — that wait is the adder's delay.
Full adder
- Adds three bits (A, B, carry-in) → Sum and Carry-out.
- Sum = A ⊕ B ⊕ Cin; Cout = AB + Cin(A ⊕ B).
Ripple carry & subtract
- Carry-out of each stage feeds the carry-in of the next — it 'ripples'.
- Subtraction: invert B and set carry-in to 1 (adds the two's complement).
- Trade-off: simple but slow — carry must propagate through every stage.
Full-adder truth table
| A | B | Cin | Sum | Cout |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Black-box view
Inputs on the left → outputs on the right · particles show signal direction
Functional / block diagram
Functional blocks · arrows animate in the direction data flows
Logic diagram
Click inputs to toggle · glowing wires carry 1 · particles show signal direction
4-bit ripple adder / subtractor
▶ live simulatorCarry out = 1 · the glowing column is the full-adder stage currently computing; carry ripples right→left.
HDL — Verilog · VHDL · SystemVerilog
module adder #(parameter N = 4)
(input [N-1:0] a, b,
input cin,
output [N-1:0] sum,
output cout);
assign {cout, sum} = a + b + cin;
endmoduleParameterized adder. '+' synthesizes to a carry chain; {cout,sum} captures the carry.
Real-world applications
The 5 Whys
- 1
Why chain full adders? To add numbers wider than one bit.
- 2
Why does carry ripple? Each bit's sum depends on the carry from the bit below.
- 3
Why is ripple slow? The last bit must wait for the carry to travel through all stages.
- 4
Why tolerate it anyway? It is the smallest, simplest adder — fine for narrow widths.
- 5
Root cause: speed-vs-area trade-off; faster adders (carry-lookahead) cost more gates.
Cheat sheet
Working principle
- Cascade n full adders; for subtract, XOR the B inputs with a mode line and set carry-in = 1.
- A combinational circuit that adds (or subtracts) two n-bit binary numbers.
Formulas & Boolean expressions
- Sum = A ⊕ B ⊕ Cin
- Cout = A·B + Cin·(A ⊕ B)
- Subtract: A − B = A + B′ + 1
- Overflow = Cn ⊕ Cn₋₁
- Sum = A ⊕ B ⊕ Cin; Cout = AB + Cin(A ⊕ B).
Key facts
- Adds three bits (A, B, carry-in) → Sum and Carry-out.
- Carry-out of each stage feeds the carry-in of the next — it 'ripples'.
Why it exists
- Root cause: speed-vs-area trade-off; faster adders (carry-lookahead) cost more gates.