non-critical paths and wastes area. First identify the violating paths at the route stage; only raise uncertainty if there are many violations versus the post-CTS database. If only a few paths violate, investigate the cause - routing those critical nets with NDR or on higher metal layers may fix them.

KEY Improve correlation by matching delay engines (AWE), reducing congestion-driven crosstalk, and selectively using NDR or higher layers.

Post-Route to Sign-Off Correlation

• PrimeTime always uses the Arnoldi delay engine for interconnect RC delay, so for post-route designs turn on the Arnoldi engine in ICC to match it.
• Derates used in the implementation tool may not match the signoff PrimeTime derates. Report the same path with derates in both tools and check consistency; if they differ, apply matching derates in the implementation tool.
• If timing mismatches when comparing an IC Compiler path (after extract_rc and report_timing) versus PrimeTime (after read_parasitics and report_timing), narrow it down by reading the same parasitics file into IC Compiler, deriving RC scaling factors from it, and applying those factors to improve correlation.
• Report all timing variables from signoff PrimeTime and compare them against the implementation tool's variables; adjust the implementation-tool variables to match. ICC and PT-SI share the same variables, while other implementation tools may only have equivalent functionality.
• The implementation tool uses Graph-Based Analysis (GBA) by default, computing cell delay from the worst input-pin slew, which is pessimistic. PrimeTime can run both GBA and Path-Based Analysis (PBA). Setting PrimeTime to GBA when it is using PBA will improve correlation.
• In ICC, run check_signoff_correlation to compare ICC against PrimeTime and StarRC - including timing and SI variables,