KEY A lockup latch sits at domain crossings to absorb clock skew during scan shift.

Buffers vs Lockup Latch for Large Skew

Using buffers for large clock skew is discouraged. Adding many buffers degrades performance by increasing area and power and raises the chance of on-chip variation (OCV). The optimised solution for large skew and hold constraints is to insert a lockup latch instead.

KEY Avoid buffers for large skew - they cost area/power and worsen OCV; use a lockup latch.

Advantages of a Lockup Latch

• Power and area efficient.
• Handles more on-chip variation (OCV) easily.
• A robust way to meet hold constraints during scan-shift mode.
• Prevents data corruption (data being overwritten) caused by clock skew.

KEY Lockup latches are area/power efficient, OCV-tolerant, and prevent skew-driven data corruption.

Lockup Latch vs Lockup Register

A lockup latch occupies roughly half the area of a lockup register, so it is the more optimised choice for power and area. With a negative lockup latch there is no need to worry about timing constraints at the functional frequency, which is not true for a lockup register - so the lockup latch is more widely used.

KEY A lockup latch is about half the area of a lockup register and is generally preferred.

Clock Latency

Clock latency is the difference between when the clock leaves its source and when it arrives at a pin. It is split into source latency and network latency: network latency reflects how fast the clock network runs, and source latency is the propagation delay from the clock source