to the clock port.
KEY Clock latency = source latency (source to port) plus network latency (port to flop).
Clock Skew vs Global Skew
No. Global skew is the skew between two mutually exclusive flip-flops that are not related by fan-in or fan-out. Clock skew refers to the skew between two dependent (related) flip-flops.
KEY Global skew is between unrelated flops; clock skew is between dependent flops.
Clock Generator vs Clock Distributor
A clock is a signal that oscillates between low and high states. The clock distributor is the network - buffers and metal - that delivers the clock to all clocked elements.
The clock generator is the electronic circuit that produces the timing signal and synchronises the design; its basic components are an amplifier and a resonant circuit.
KEY Clock generator produces the clock; clock distributor is the network that delivers it everywhere.
Two Clock Distribution Styles
- Clock tree - built by clock tree synthesis (CTS), which places and routes the clock-tree elements.
- Clock mesh (or clock grid) distribution system.
KEY The two clock distribution styles are the clock tree (CTS) and the clock mesh/grid.
Clock Grid Distribution System
The clock grid aims to give uniform delay from the clock source to every receiver (flip-flops, latches), minimising skew by using stages. The number of stages depends on chip size and process technology, and fewer stages is preferred, with equal delay targeted in each stage.
There are two distribution stages: source to block boundaries, then block